3268 		r = pll->cinfo.clkout[0];  in dispc_fclk_rate()
3275 		r = pll->cinfo.clkout[0];  in dispc_fclk_rate()
3306 			r = pll->cinfo.clkout[0];  in dispc_mgr_lclk_rate()
3313 			r = pll->cinfo.clkout[0];  in dispc_mgr_lclk_rate()
3604 		struct dispc_clock_info *cinfo)  in dispc_calc_clock_rates()  argument
3606 	if (cinfo->lck_div > 255 || cinfo->lck_div == 0)  in dispc_calc_clock_rates()
3608 	if (cinfo->pck_div < 1 || cinfo->pck_div > 255)  in dispc_calc_clock_rates()
3611 	cinfo->lck = dispc_fclk_rate / cinfo->lck_div;  in dispc_calc_clock_rates()
3612 	cinfo->pck = cinfo->lck / cinfo->pck_div;  in dispc_calc_clock_rates()
3678 		const struct dispc_clock_info *cinfo)  in dispc_mgr_set_clock_div()  argument
3680 	DSSDBG("lck = %lu (%u)\n", cinfo->lck, cinfo->lck_div);  in dispc_mgr_set_clock_div()
3681 	DSSDBG("pck = %lu (%u)\n", cinfo->pck, cinfo->pck_div);  in dispc_mgr_set_clock_div()
3683 	dispc_mgr_set_lcd_divisor(channel, cinfo->lck_div, cinfo->pck_div);  in dispc_mgr_set_clock_div()
3687 		struct dispc_clock_info *cinfo)  in dispc_mgr_get_clock_div()  argument
3693 	cinfo->lck_div = REG_GET(DISPC_DIVISORo(channel), 23, 16);  in dispc_mgr_get_clock_div()
3694 	cinfo->pck_div = REG_GET(DISPC_DIVISORo(channel), 7, 0);  in dispc_mgr_get_clock_div()
3696 	cinfo->lck = fck / cinfo->lck_div;  in dispc_mgr_get_clock_div()
3697 	cinfo->pck = cinfo->lck / cinfo->pck_div;  in dispc_mgr_get_clock_div()