Lines Matching refs:ddata
67 static int jbt_ret_write_0(struct panel_drv_data *ddata, u8 reg) in jbt_ret_write_0() argument
72 rc = spi_write(ddata->spi_dev, (u8 *)&tx_buf, in jbt_ret_write_0()
75 dev_err(&ddata->spi_dev->dev, in jbt_ret_write_0()
81 static int jbt_reg_write_1(struct panel_drv_data *ddata, u8 reg, u8 data) in jbt_reg_write_1() argument
88 rc = spi_write(ddata->spi_dev, (u8 *)tx_buf, in jbt_reg_write_1()
91 dev_err(&ddata->spi_dev->dev, in jbt_reg_write_1()
97 static int jbt_reg_write_2(struct panel_drv_data *ddata, u8 reg, u16 data) in jbt_reg_write_2() argument
106 rc = spi_write(ddata->spi_dev, (u8 *)tx_buf, in jbt_reg_write_2()
110 dev_err(&ddata->spi_dev->dev, in jbt_reg_write_2()
172 struct panel_drv_data *ddata = to_panel_data(dssdev); in td028ttec1_panel_connect() local
173 struct omap_dss_device *in = ddata->in; in td028ttec1_panel_connect()
188 struct panel_drv_data *ddata = to_panel_data(dssdev); in td028ttec1_panel_disconnect() local
189 struct omap_dss_device *in = ddata->in; in td028ttec1_panel_disconnect()
199 struct panel_drv_data *ddata = to_panel_data(dssdev); in td028ttec1_panel_enable() local
200 struct omap_dss_device *in = ddata->in; in td028ttec1_panel_enable()
209 if (ddata->data_lines) in td028ttec1_panel_enable()
210 in->ops.dpi->set_data_lines(in, ddata->data_lines); in td028ttec1_panel_enable()
211 in->ops.dpi->set_timings(in, &ddata->videomode); in td028ttec1_panel_enable()
221 r |= jbt_ret_write_0(ddata, 0x00); in td028ttec1_panel_enable()
223 r |= jbt_ret_write_0(ddata, 0x00); in td028ttec1_panel_enable()
225 r |= jbt_ret_write_0(ddata, 0x00); in td028ttec1_panel_enable()
234 r |= jbt_reg_write_1(ddata, JBT_REG_POWER_ON_OFF, 0x17); in td028ttec1_panel_enable()
237 r |= jbt_reg_write_1(ddata, JBT_REG_DISPLAY_MODE, 0x80); in td028ttec1_panel_enable()
240 r |= jbt_reg_write_1(ddata, JBT_REG_QUAD_RATE, 0x00); in td028ttec1_panel_enable()
243 r |= jbt_reg_write_1(ddata, JBT_REG_POWER_ON_OFF, 0x16); in td028ttec1_panel_enable()
246 r |= jbt_reg_write_2(ddata, JBT_REG_OUTPUT_CONTROL, 0xfff9); in td028ttec1_panel_enable()
249 r |= jbt_ret_write_0(ddata, JBT_REG_SLEEP_OUT); in td028ttec1_panel_enable()
254 r |= jbt_reg_write_1(ddata, JBT_REG_DISPLAY_MODE1, 0x01); in td028ttec1_panel_enable()
255 r |= jbt_reg_write_1(ddata, JBT_REG_DISPLAY_MODE2, 0x00); in td028ttec1_panel_enable()
256 r |= jbt_reg_write_1(ddata, JBT_REG_RGB_FORMAT, 0x60); in td028ttec1_panel_enable()
257 r |= jbt_reg_write_1(ddata, JBT_REG_DRIVE_SYSTEM, 0x10); in td028ttec1_panel_enable()
258 r |= jbt_reg_write_1(ddata, JBT_REG_BOOSTER_OP, 0x56); in td028ttec1_panel_enable()
259 r |= jbt_reg_write_1(ddata, JBT_REG_BOOSTER_MODE, 0x33); in td028ttec1_panel_enable()
260 r |= jbt_reg_write_1(ddata, JBT_REG_BOOSTER_FREQ, 0x11); in td028ttec1_panel_enable()
261 r |= jbt_reg_write_1(ddata, JBT_REG_BOOSTER_FREQ, 0x11); in td028ttec1_panel_enable()
262 r |= jbt_reg_write_1(ddata, JBT_REG_OPAMP_SYSCLK, 0x02); in td028ttec1_panel_enable()
263 r |= jbt_reg_write_1(ddata, JBT_REG_VSC_VOLTAGE, 0x2b); in td028ttec1_panel_enable()
264 r |= jbt_reg_write_1(ddata, JBT_REG_VCOM_VOLTAGE, 0x40); in td028ttec1_panel_enable()
265 r |= jbt_reg_write_1(ddata, JBT_REG_EXT_DISPL, 0x03); in td028ttec1_panel_enable()
266 r |= jbt_reg_write_1(ddata, JBT_REG_DCCLK_DCEV, 0x04); in td028ttec1_panel_enable()
271 r |= jbt_reg_write_1(ddata, JBT_REG_ASW_SLEW, 0x04); in td028ttec1_panel_enable()
272 r |= jbt_reg_write_1(ddata, JBT_REG_DUMMY_DISPLAY, 0x00); in td028ttec1_panel_enable()
274 r |= jbt_reg_write_1(ddata, JBT_REG_SLEEP_OUT_FR_A, 0x11); in td028ttec1_panel_enable()
275 r |= jbt_reg_write_1(ddata, JBT_REG_SLEEP_OUT_FR_B, 0x11); in td028ttec1_panel_enable()
276 r |= jbt_reg_write_1(ddata, JBT_REG_SLEEP_OUT_FR_C, 0x11); in td028ttec1_panel_enable()
277 r |= jbt_reg_write_2(ddata, JBT_REG_SLEEP_IN_LCCNT_D, 0x2040); in td028ttec1_panel_enable()
278 r |= jbt_reg_write_2(ddata, JBT_REG_SLEEP_IN_LCCNT_E, 0x60c0); in td028ttec1_panel_enable()
279 r |= jbt_reg_write_2(ddata, JBT_REG_SLEEP_IN_LCCNT_F, 0x1020); in td028ttec1_panel_enable()
280 r |= jbt_reg_write_2(ddata, JBT_REG_SLEEP_IN_LCCNT_G, 0x60c0); in td028ttec1_panel_enable()
282 r |= jbt_reg_write_2(ddata, JBT_REG_GAMMA1_FINE_1, 0x5533); in td028ttec1_panel_enable()
283 r |= jbt_reg_write_1(ddata, JBT_REG_GAMMA1_FINE_2, 0x00); in td028ttec1_panel_enable()
284 r |= jbt_reg_write_1(ddata, JBT_REG_GAMMA1_INCLINATION, 0x00); in td028ttec1_panel_enable()
285 r |= jbt_reg_write_1(ddata, JBT_REG_GAMMA1_BLUE_OFFSET, 0x00); in td028ttec1_panel_enable()
287 r |= jbt_reg_write_2(ddata, JBT_REG_HCLOCK_VGA, 0x1f0); in td028ttec1_panel_enable()
288 r |= jbt_reg_write_1(ddata, JBT_REG_BLANK_CONTROL, 0x02); in td028ttec1_panel_enable()
289 r |= jbt_reg_write_2(ddata, JBT_REG_BLANK_TH_TV, 0x0804); in td028ttec1_panel_enable()
291 r |= jbt_reg_write_1(ddata, JBT_REG_CKV_ON_OFF, 0x01); in td028ttec1_panel_enable()
292 r |= jbt_reg_write_2(ddata, JBT_REG_CKV_1_2, 0x0000); in td028ttec1_panel_enable()
294 r |= jbt_reg_write_2(ddata, JBT_REG_OEV_TIMING, 0x0d0e); in td028ttec1_panel_enable()
295 r |= jbt_reg_write_2(ddata, JBT_REG_ASW_TIMING_1, 0x11a4); in td028ttec1_panel_enable()
296 r |= jbt_reg_write_1(ddata, JBT_REG_ASW_TIMING_2, 0x0e); in td028ttec1_panel_enable()
298 r |= jbt_ret_write_0(ddata, JBT_REG_DISPLAY_ON); in td028ttec1_panel_enable()
309 struct panel_drv_data *ddata = to_panel_data(dssdev); in td028ttec1_panel_disable() local
310 struct omap_dss_device *in = ddata->in; in td028ttec1_panel_disable()
317 jbt_ret_write_0(ddata, JBT_REG_DISPLAY_OFF); in td028ttec1_panel_disable()
318 jbt_reg_write_2(ddata, JBT_REG_OUTPUT_CONTROL, 0x8002); in td028ttec1_panel_disable()
319 jbt_ret_write_0(ddata, JBT_REG_SLEEP_IN); in td028ttec1_panel_disable()
320 jbt_reg_write_1(ddata, JBT_REG_POWER_ON_OFF, 0x00); in td028ttec1_panel_disable()
330 struct panel_drv_data *ddata = to_panel_data(dssdev); in td028ttec1_panel_set_timings() local
331 struct omap_dss_device *in = ddata->in; in td028ttec1_panel_set_timings()
333 ddata->videomode = *timings; in td028ttec1_panel_set_timings()
342 struct panel_drv_data *ddata = to_panel_data(dssdev); in td028ttec1_panel_get_timings() local
344 *timings = ddata->videomode; in td028ttec1_panel_get_timings()
350 struct panel_drv_data *ddata = to_panel_data(dssdev); in td028ttec1_panel_check_timings() local
351 struct omap_dss_device *in = ddata->in; in td028ttec1_panel_check_timings()
371 struct panel_drv_data *ddata = dev_get_drvdata(&spi->dev); in td028ttec1_panel_probe_pdata() local
383 ddata->in = in; in td028ttec1_panel_probe_pdata()
385 ddata->data_lines = pdata->data_lines; in td028ttec1_panel_probe_pdata()
387 dssdev = &ddata->dssdev; in td028ttec1_panel_probe_pdata()
396 struct panel_drv_data *ddata = dev_get_drvdata(&spi->dev); in td028ttec1_probe_of() local
405 ddata->in = in; in td028ttec1_probe_of()
412 struct panel_drv_data *ddata; in td028ttec1_panel_probe() local
427 ddata = devm_kzalloc(&spi->dev, sizeof(*ddata), GFP_KERNEL); in td028ttec1_panel_probe()
428 if (ddata == NULL) in td028ttec1_panel_probe()
431 dev_set_drvdata(&spi->dev, ddata); in td028ttec1_panel_probe()
433 ddata->spi_dev = spi; in td028ttec1_panel_probe()
447 ddata->videomode = td028ttec1_panel_timings; in td028ttec1_panel_probe()
449 dssdev = &ddata->dssdev; in td028ttec1_panel_probe()
454 dssdev->panel.timings = ddata->videomode; in td028ttec1_panel_probe()
455 dssdev->phy.dpi.data_lines = ddata->data_lines; in td028ttec1_panel_probe()
466 omap_dss_put_device(ddata->in); in td028ttec1_panel_probe()
472 struct panel_drv_data *ddata = dev_get_drvdata(&spi->dev); in td028ttec1_panel_remove() local
473 struct omap_dss_device *dssdev = &ddata->dssdev; in td028ttec1_panel_remove()
474 struct omap_dss_device *in = ddata->in; in td028ttec1_panel_remove()
476 dev_dbg(&ddata->spi_dev->dev, "%s\n", __func__); in td028ttec1_panel_remove()