Lines Matching refs:lcdc
80 } lcdc; variable
84 lcdc.irq_mask |= mask; in enable_irqs()
89 lcdc.irq_mask &= ~mask; in disable_irqs()
120 l |= lcdc.irq_mask | OMAP_LCDC_IRQ_DONE; /* enabled IRQs */ in enable_controller()
142 init_completion(&lcdc.last_frame_complete); in disable_controller()
144 if (!wait_for_completion_timeout(&lcdc.last_frame_complete, in disable_controller()
146 dev_err(lcdc.fbdev->dev, "timeout waiting for FRAME DONE\n"); in disable_controller()
157 dev_err(lcdc.fbdev->dev, in reset_controller()
166 dev_err(lcdc.fbdev->dev, in reset_controller()
184 struct omapfb_plane_struct *plane = lcdc.fbdev->fb_info[0]->par; in setup_lcd_dma()
185 struct fb_var_screeninfo *var = &lcdc.fbdev->fb_info[0]->var; in setup_lcd_dma()
189 src = lcdc.vram_phys + lcdc.frame_offset; in setup_lcd_dma()
194 lcdc.color_mode == OMAPFB_COLOR_YUV420 || in setup_lcd_dma()
195 (lcdc.xres & 1)) in setup_lcd_dma()
199 xelem = lcdc.xres * lcdc.bpp / 8 / esize; in setup_lcd_dma()
200 yelem = lcdc.yres; in setup_lcd_dma()
209 xelem = lcdc.yres * lcdc.bpp / 16; in setup_lcd_dma()
210 yelem = lcdc.xres; in setup_lcd_dma()
217 dev_dbg(lcdc.fbdev->dev, in setup_lcd_dma()
223 int bpp = lcdc.bpp; in setup_lcd_dma()
229 if (lcdc.color_mode == OMAPFB_COLOR_YUV420) in setup_lcd_dma()
233 lcdc.screen_width * bpp / 8 / esize); in setup_lcd_dma()
261 complete(&lcdc.last_frame_complete); in lcdc_irq_handler()
265 complete(&lcdc.palette_load_complete); in lcdc_irq_handler()
296 struct fb_var_screeninfo *var = &lcdc.fbdev->fb_info[0]->var; in omap_lcdc_setup_plane()
297 struct lcd_panel *panel = lcdc.fbdev->panel; in omap_lcdc_setup_plane()
310 dev_dbg(lcdc.fbdev->dev, in omap_lcdc_setup_plane()
317 lcdc.frame_offset = offset; in omap_lcdc_setup_plane()
318 lcdc.xres = width; in omap_lcdc_setup_plane()
319 lcdc.yres = height; in omap_lcdc_setup_plane()
320 lcdc.screen_width = screen_width; in omap_lcdc_setup_plane()
321 lcdc.color_mode = color_mode; in omap_lcdc_setup_plane()
325 lcdc.bpp = 8; in omap_lcdc_setup_plane()
326 lcdc.palette_code = 0x3000; in omap_lcdc_setup_plane()
327 lcdc.palette_size = 512; in omap_lcdc_setup_plane()
330 lcdc.bpp = 16; in omap_lcdc_setup_plane()
331 lcdc.palette_code = 0x4000; in omap_lcdc_setup_plane()
332 lcdc.palette_size = 32; in omap_lcdc_setup_plane()
335 lcdc.bpp = 16; in omap_lcdc_setup_plane()
336 lcdc.palette_code = 0x4000; in omap_lcdc_setup_plane()
337 lcdc.palette_size = 32; in omap_lcdc_setup_plane()
340 if (lcdc.ext_mode) { in omap_lcdc_setup_plane()
341 lcdc.bpp = 12; in omap_lcdc_setup_plane()
346 if (lcdc.ext_mode) { in omap_lcdc_setup_plane()
347 lcdc.bpp = 16; in omap_lcdc_setup_plane()
358 dev_dbg(lcdc.fbdev->dev, "invalid color mode %d\n", color_mode); in omap_lcdc_setup_plane()
363 if (lcdc.ext_mode) { in omap_lcdc_setup_plane()
368 if (lcdc.update_mode == OMAPFB_AUTO_UPDATE) { in omap_lcdc_setup_plane()
380 dev_dbg(lcdc.fbdev->dev, in omap_lcdc_enable_plane()
382 plane, enable, lcdc.update_mode, lcdc.ext_mode); in omap_lcdc_enable_plane()
398 palette = (u16 *)lcdc.palette_virt; in load_palette()
401 *(u16 *)palette |= lcdc.palette_code; in load_palette()
403 omap_set_lcd_dma_b1(lcdc.palette_phys, in load_palette()
404 lcdc.palette_size / 4 + 1, 1, OMAP_DMA_DATA_TYPE_S32); in load_palette()
409 init_completion(&lcdc.palette_load_complete); in load_palette()
413 if (!wait_for_completion_timeout(&lcdc.palette_load_complete, in load_palette()
415 dev_err(lcdc.fbdev->dev, "timeout waiting for FRAME DONE\n"); in load_palette()
420 omap_set_lcd_dma_single_transfer(lcdc.ext_mode); in load_palette()
429 if (lcdc.color_mode != OMAPFB_COLOR_CLUT_8BPP || regno > 255) in omap_lcdc_setcolreg()
432 palette = (u16 *)lcdc.palette_virt; in omap_lcdc_setcolreg()
455 lck = clk_get_rate(lcdc.lcd_ck); in calc_ck_div()
464 dev_warn(lcdc.fbdev->dev, "pixclock %d kHz too low.\n", in calc_ck_div()
472 struct lcd_panel *panel = lcdc.fbdev->panel; in setup_regs()
508 lck = clk_get_rate(lcdc.lcd_ck); in setup_regs()
513 dev_warn(lcdc.fbdev->dev, in setup_regs()
538 if (mode != lcdc.update_mode) { in omap_lcdc_set_update_mode()
551 lcdc.update_mode = mode; in omap_lcdc_set_update_mode()
556 lcdc.update_mode = mode; in omap_lcdc_set_update_mode()
568 return lcdc.update_mode; in omap_lcdc_get_update_mode()
591 if (lcdc.dma_callback) in omap_lcdc_set_dma_callback()
594 lcdc.dma_callback = callback; in omap_lcdc_set_dma_callback()
595 lcdc.dma_callback_data = data; in omap_lcdc_set_dma_callback()
603 lcdc.dma_callback = NULL; in omap_lcdc_free_dma_callback()
609 if (lcdc.dma_callback) in lcdc_dma_handler()
610 lcdc.dma_callback(lcdc.dma_callback_data); in lcdc_dma_handler()
615 lcdc.palette_virt = dma_alloc_writecombine(lcdc.fbdev->dev, in alloc_palette_ram()
616 MAX_PALETTE_SIZE, &lcdc.palette_phys, GFP_KERNEL); in alloc_palette_ram()
617 if (lcdc.palette_virt == NULL) { in alloc_palette_ram()
618 dev_err(lcdc.fbdev->dev, "failed to alloc palette memory\n"); in alloc_palette_ram()
621 memset(lcdc.palette_virt, 0, MAX_PALETTE_SIZE); in alloc_palette_ram()
628 dma_free_writecombine(lcdc.fbdev->dev, MAX_PALETTE_SIZE, in free_palette_ram()
629 lcdc.palette_virt, lcdc.palette_phys); in free_palette_ram()
636 struct lcd_panel *panel = lcdc.fbdev->panel; in alloc_fbmem()
644 lcdc.vram_size = frame_size; in alloc_fbmem()
645 lcdc.vram_virt = dma_alloc_writecombine(lcdc.fbdev->dev, in alloc_fbmem()
646 lcdc.vram_size, &lcdc.vram_phys, GFP_KERNEL); in alloc_fbmem()
647 if (lcdc.vram_virt == NULL) { in alloc_fbmem()
648 dev_err(lcdc.fbdev->dev, "unable to allocate FB DMA memory\n"); in alloc_fbmem()
652 region->paddr = lcdc.vram_phys; in alloc_fbmem()
653 region->vaddr = lcdc.vram_virt; in alloc_fbmem()
656 memset(lcdc.vram_virt, 0, lcdc.vram_size); in alloc_fbmem()
663 dma_free_writecombine(lcdc.fbdev->dev, lcdc.vram_size, in free_fbmem()
664 lcdc.vram_virt, lcdc.vram_phys); in free_fbmem()
670 dev_err(lcdc.fbdev->dev, "no memory regions defined\n"); in setup_fbmem()
675 dev_err(lcdc.fbdev->dev, "only one plane is supported\n"); in setup_fbmem()
690 lcdc.irq_mask = 0; in omap_lcdc_init()
692 lcdc.fbdev = fbdev; in omap_lcdc_init()
693 lcdc.ext_mode = ext_mode; in omap_lcdc_init()
701 lcdc.lcd_ck = clk_get(fbdev->dev, "lcd_ck"); in omap_lcdc_init()
702 if (IS_ERR(lcdc.lcd_ck)) { in omap_lcdc_init()
704 r = PTR_ERR(lcdc.lcd_ck); in omap_lcdc_init()
722 r = clk_set_rate(lcdc.lcd_ck, rate); in omap_lcdc_init()
727 clk_enable(lcdc.lcd_ck); in omap_lcdc_init()
760 free_irq(OMAP_LCDC_IRQ, lcdc.fbdev); in omap_lcdc_init()
762 clk_disable(lcdc.lcd_ck); in omap_lcdc_init()
764 clk_put(lcdc.lcd_ck); in omap_lcdc_init()
771 if (!lcdc.ext_mode) in omap_lcdc_cleanup()
775 free_irq(OMAP_LCDC_IRQ, lcdc.fbdev); in omap_lcdc_cleanup()
776 clk_disable(lcdc.lcd_ck); in omap_lcdc_cleanup()
777 clk_put(lcdc.lcd_ck); in omap_lcdc_cleanup()