19 	u32 tmp;  in DisableVGA()  local
23 	tmp = STG_READ_REG(SoftwareReset);  in DisableVGA()
25 	STG_WRITE_REG(SoftwareReset, tmp);  in DisableVGA()
33 	tmp = STG_READ_REG(SoftwareReset);  in DisableVGA()
34 	tmp |= SET_BIT(8);  in DisableVGA()
35 	STG_WRITE_REG(SoftwareReset, tmp);  in DisableVGA()
40 	u32 tmp = 0;  in StopVTG()  local
43 	tmp = (STG_READ_REG(DACSyncCtrl)) | SET_BIT(0) | SET_BIT(2);  in StopVTG()
45 	STG_WRITE_REG(DACSyncCtrl, tmp);  in StopVTG()
50 	u32 tmp = 0;  in StartVTG()  local
53 	tmp = ((STG_READ_REG(DACSyncCtrl)) | SET_BIT(31));  in StartVTG()
56 	STG_WRITE_REG(DACSyncCtrl, tmp);  in StartVTG()
62 	u32 tmp = 0;  in SetupVTG()  local
119 	tmp = STG_READ_REG(DACHorTim1);  in SetupVTG()
122 	tmp |= (HTotal) | (HBackPorcStrt << 16);  in SetupVTG()
123 	STG_WRITE_REG(DACHorTim1, tmp);  in SetupVTG()
125 	tmp = STG_READ_REG(DACHorTim2);  in SetupVTG()
128 	tmp |= (HDisplayStrt << 16) | HLeftBorderStrt;  in SetupVTG()
129 	STG_WRITE_REG(DACHorTim2, tmp);  in SetupVTG()
131 	tmp = STG_READ_REG(DACHorTim3);  in SetupVTG()
134 	tmp |= (HFrontPorchStrt << 16) | HRightBorderStrt;  in SetupVTG()
135 	STG_WRITE_REG(DACHorTim3, tmp);  in SetupVTG()
138 	tmp = STG_READ_REG(DACVerTim1);  in SetupVTG()
141 	tmp |= (VBackPorchStrt << 16) | (VTotal);  in SetupVTG()
142 	STG_WRITE_REG(DACVerTim1, tmp);  in SetupVTG()
144 	tmp = STG_READ_REG(DACVerTim2);  in SetupVTG()
147 	tmp |= (VDisplayStrt << 16) | VTopBorderStrt;  in SetupVTG()
148 	STG_WRITE_REG(DACVerTim2, tmp);  in SetupVTG()
150 	tmp = STG_READ_REG(DACVerTim3);  in SetupVTG()
153 	tmp |= (VFrontPorchStrt << 16) | VBottomBorderStrt;  in SetupVTG()
154 	STG_WRITE_REG(DACVerTim3, tmp);  in SetupVTG()
157 	tmp = STG_READ_REG(DACSyncCtrl) | SET_BIT(3) | SET_BIT(1);  in SetupVTG()
160 		tmp &= ~0x8;  in SetupVTG()
162 		tmp &= ~0x2;  in SetupVTG()
164 		tmp &= ~0xA;  in SetupVTG()
166 		tmp &= ~0x0;  in SetupVTG()
169 	STG_WRITE_REG(DACSyncCtrl, tmp);  in SetupVTG()