664 static int calc_vclock(int index, int m1, int m2, int n, int p1, int p2,  in calc_vclock()  argument
675 		p = ((p1 + 2) * (1 << (p2 + 1)));  in calc_vclock()
677 		p = ((p1) * (p2 ? 5 : 10));  in calc_vclock()
685 	int p1, p2;  in intelfbhw_get_p1p2()  local
689 			p1 = 1;  in intelfbhw_get_p1p2()
691 			p1 = (dpll >> DPLL_P1_SHIFT) & 0xff;  in intelfbhw_get_p1p2()
693 		p1 = ffs(p1);  in intelfbhw_get_p1p2()
698 			p1 = 0;  in intelfbhw_get_p1p2()
700 			p1 = (dpll >> DPLL_P1_SHIFT) & DPLL_P1_MASK;  in intelfbhw_get_p1p2()
704 	*o_p1 = p1;  in intelfbhw_get_p1p2()
714 	int i, m1, m2, n, p1, p2;  in intelfbhw_print_hw_state()  local
729 	intelfbhw_get_p1p2(dinfo, hw->vga_pd, &p1, &p2);  in intelfbhw_print_hw_state()
732 	       m1, m2, n, p1, p2);  in intelfbhw_print_hw_state()
734 	       calc_vclock(index, m1, m2, n, p1, p2, 0));  in intelfbhw_print_hw_state()
740 	intelfbhw_get_p1p2(dinfo, hw->vga_pd, &p1, &p2);  in intelfbhw_print_hw_state()
742 	       m1, m2, n, p1, p2);  in intelfbhw_print_hw_state()
744 	       calc_vclock(index, m1, m2, n, p1, p2, 0));  in intelfbhw_print_hw_state()
757 	intelfbhw_get_p1p2(dinfo, hw->dpll_a, &p1, &p2);  in intelfbhw_print_hw_state()
760 	       m1, m2, n, p1, p2);  in intelfbhw_print_hw_state()
762 	       calc_vclock(index, m1, m2, n, p1, p2, 0));  in intelfbhw_print_hw_state()
768 	intelfbhw_get_p1p2(dinfo, hw->dpll_a, &p1, &p2);  in intelfbhw_print_hw_state()
771 	       m1, m2, n, p1, p2);  in intelfbhw_print_hw_state()
773 	       calc_vclock(index, m1, m2, n, p1, p2, 0));  in intelfbhw_print_hw_state()
903 	int p1, p2;  in splitp()  local
909 		p1 = p / (p2 ? 5 : 10);  in splitp()
911 		*retp1 = (unsigned int)p1;  in splitp()
920 	p1 = (p / (1 << (p2 + 1))) - 2;  in splitp()
921 	if (p % 4 == 0 && p1 < pll->min_p1) {  in splitp()
923 		p1 = (p / (1 << (p2 + 1))) - 2;  in splitp()
925 	if (p1 < pll->min_p1 || p1 > pll->max_p1 ||  in splitp()
926 	    (p1 + 2) * (1 << (p2 + 1)) != p) {  in splitp()
929 		*retp1 = (unsigned int)p1;  in splitp()
938 	u32 m1, m2, n, p1, p2, n1, testm;  in calc_pll_params()  local
965 		if (splitp(index, p, &p1, &p2)) {  in calc_pll_params()
1012 	splitp(index, p, &p1, &p2);  in calc_pll_params()
1017 		m, m1, m2, n, n1, p, p1, p2,  in calc_pll_params()
1019 		calc_vclock(index, m1, m2, n1, p1, p2, 0),  in calc_pll_params()
1024 	*retp1 = p1;  in calc_pll_params()
1026 	*retclock = calc_vclock(index, m1, m2, n1, p1, p2, 0);  in calc_pll_params()
1049 	u32 m1, m2, n, p1, p2, clock_target, clock;  in intelfbhw_mode_to_hw()  local
1119 			    &n, &p1, &p2, &clock)) {  in intelfbhw_mode_to_hw()
1125 	if (check_overflow(p1, DPLL_P1_MASK, "PLL P1 parameter"))  in intelfbhw_mode_to_hw()
1142 		*dpll |= (1 << (p1 - 1)) << DPLL_P1_SHIFT;  in intelfbhw_mode_to_hw()
1144 		*dpll |= (p2 << DPLL_P2_SHIFT) | (p1 << DPLL_P1_SHIFT);  in intelfbhw_mode_to_hw()