Lines Matching refs:par
140 #define readreg(par, reg) readl((par)->regs + (reg)) argument
141 #define writereg(par, reg, val) writel((val), (par)->regs + (reg)) argument
235 static int calc_pll(int period_ps, struct gxt4500_par *par) in calc_pll() argument
253 intf = m * par->refclk_ps; in calc_pll()
259 t = par->refclk_ps * m * postdiv / n; in calc_pll()
262 par->pll_m = m; in calc_pll()
263 par->pll_n = n; in calc_pll()
264 par->pll_pd1 = pdiv1; in calc_pll()
265 par->pll_pd2 = pdiv2; in calc_pll()
276 static int calc_pixclock(struct gxt4500_par *par) in calc_pixclock() argument
278 return par->refclk_ps * par->pll_m * par->pll_pd1 * par->pll_pd2 in calc_pixclock()
279 / par->pll_n; in calc_pixclock()
283 struct gxt4500_par *par) in gxt4500_var_to_par() argument
292 if (calc_pll(var->pixclock, par) < 0) in gxt4500_var_to_par()
298 par->pixfmt = DFA_PIX_32BIT; in gxt4500_var_to_par()
300 par->pixfmt = DFA_PIX_24BIT; in gxt4500_var_to_par()
303 par->pixfmt = DFA_PIX_24BIT; in gxt4500_var_to_par()
307 par->pixfmt = DFA_PIX_16BIT_1555; in gxt4500_var_to_par()
309 par->pixfmt = DFA_PIX_16BIT_565; in gxt4500_var_to_par()
312 par->pixfmt = DFA_PIX_8BIT; in gxt4500_var_to_par()
362 struct gxt4500_par par; in gxt4500_check_var() local
365 par = *(struct gxt4500_par *)info->par; in gxt4500_check_var()
366 err = gxt4500_var_to_par(var, &par); in gxt4500_check_var()
368 var->pixclock = calc_pixclock(&par); in gxt4500_check_var()
369 gxt4500_unpack_pixfmt(var, par.pixfmt); in gxt4500_check_var()
376 struct gxt4500_par *par = info->par; in gxt4500_set_par() local
385 save_par = *par; in gxt4500_set_par()
386 err = gxt4500_var_to_par(var, par); in gxt4500_set_par()
388 *par = save_par; in gxt4500_set_par()
393 ctrlreg = readreg(par, DTG_CONTROL); in gxt4500_set_par()
395 writereg(par, DTG_CONTROL, ctrlreg); in gxt4500_set_par()
398 tmp = readreg(par, PLL_C) & ~0x7f; in gxt4500_set_par()
399 if (par->pll_n < 38) in gxt4500_set_par()
401 if (par->pll_n < 69) in gxt4500_set_par()
403 else if (par->pll_n < 100) in gxt4500_set_par()
407 writereg(par, PLL_C, tmp); in gxt4500_set_par()
408 writereg(par, PLL_M, mdivtab[par->pll_m - 1]); in gxt4500_set_par()
409 writereg(par, PLL_N, ndivtab[par->pll_n - 2]); in gxt4500_set_par()
410 tmp = ((8 - par->pll_pd2) << 3) | (8 - par->pll_pd1); in gxt4500_set_par()
411 if (par->pll_pd1 == 8 || par->pll_pd2 == 8) { in gxt4500_set_par()
413 writereg(par, PLL_POSTDIV, tmp | 0x9); in gxt4500_set_par()
416 writereg(par, PLL_POSTDIV, tmp); in gxt4500_set_par()
420 writereg(par, CURSOR_MODE, CURSOR_MODE_OFF); in gxt4500_set_par()
423 writereg(par, CTRL_REG0, CR0_RASTER_RESET | (CR0_RASTER_RESET << 16)); in gxt4500_set_par()
425 writereg(par, CTRL_REG0, CR0_RASTER_RESET << 16); in gxt4500_set_par()
430 writereg(par, DTG_HORIZ_EXTENT, htot - 1); in gxt4500_set_par()
431 writereg(par, DTG_HORIZ_DISPLAY, var->xres - 1); in gxt4500_set_par()
432 writereg(par, DTG_HSYNC_START, var->xres + var->right_margin - 1); in gxt4500_set_par()
433 writereg(par, DTG_HSYNC_END, in gxt4500_set_par()
435 writereg(par, DTG_HSYNC_END_COMP, in gxt4500_set_par()
437 writereg(par, DTG_VERT_EXTENT, in gxt4500_set_par()
440 writereg(par, DTG_VERT_DISPLAY, var->yres - 1); in gxt4500_set_par()
441 writereg(par, DTG_VSYNC_START, var->yres + var->lower_margin - 1); in gxt4500_set_par()
442 writereg(par, DTG_VSYNC_END, in gxt4500_set_par()
447 writereg(par, DTG_VERT_SHORT, htot - prefetch_pix - 1); in gxt4500_set_par()
449 writereg(par, DTG_CONTROL, ctrlreg); in gxt4500_set_par()
467 writereg(par, FB_AB_CTRL, FB_CTRL_TYPE | (wid_tiles << 16) | 0); in gxt4500_set_par()
468 writereg(par, REFRESH_AB_CTRL, FB_CTRL_TYPE | (wid_tiles << 16) | 0); in gxt4500_set_par()
469 writereg(par, FB_CD_CTRL, FB_CTRL_TYPE | (wid_tiles << 16) | 0); in gxt4500_set_par()
470 writereg(par, REFRESH_CD_CTRL, FB_CTRL_TYPE | (wid_tiles << 16) | 0); in gxt4500_set_par()
471 writereg(par, REFRESH_START, (var->xoffset << 16) | var->yoffset); in gxt4500_set_par()
472 writereg(par, REFRESH_SIZE, (var->xres << 16) | var->yres); in gxt4500_set_par()
476 pixfmt = par->pixfmt; in gxt4500_set_par()
478 writereg(par, DFA_FB_A, dfa_ctl); in gxt4500_set_par()
486 writereg(par, WAT_FMT + (i << 4), watfmt[pixfmt]); in gxt4500_set_par()
487 writereg(par, WAT_CMAP_OFFSET + (i << 4), 0); in gxt4500_set_par()
488 writereg(par, WAT_CTRL + (i << 4), 0); in gxt4500_set_par()
489 writereg(par, WAT_GAMMA_CTRL + (i << 4), WAT_GAMMA_DISABLE); in gxt4500_set_par()
493 ctrlreg = readreg(par, SYNC_CTL) & in gxt4500_set_par()
502 writereg(par, SYNC_CTL, ctrlreg); in gxt4500_set_par()
516 struct gxt4500_par *par = info->par; in gxt4500_setcolreg() local
522 writereg(par, CMAP + reg * 4, cmap_entry); in gxt4500_setcolreg()
524 if (reg < 16 && par->pixfmt != DFA_PIX_8BIT) { in gxt4500_setcolreg()
527 switch (par->pixfmt) { in gxt4500_setcolreg()
550 struct gxt4500_par *par = info->par; in gxt4500_pan_display() local
558 writereg(par, REFRESH_START, (var->xoffset << 16) | var->yoffset); in gxt4500_pan_display()
564 struct gxt4500_par *par = info->par; in gxt4500_blank() local
567 ctrl = readreg(par, SYNC_CTL); in gxt4500_blank()
569 dctl = readreg(par, DISP_CTL); in gxt4500_blank()
586 writereg(par, SYNC_CTL, ctrl); in gxt4500_blank()
587 writereg(par, DISP_CTL, dctl); in gxt4500_blank()
618 struct gxt4500_par *par; in gxt4500_probe() local
649 par = info->par; in gxt4500_probe()
651 par->refclk_ps = cardinfo[cardtype].refclk_ps; in gxt4500_probe()
655 info->pseudo_palette = par->pseudo_palette; in gxt4500_probe()
658 par->regs = pci_ioremap_bar(pdev, 0); in gxt4500_probe()
659 if (!par->regs) { in gxt4500_probe()
674 par->wc_cookie = arch_phys_wc_add(info->fix.smem_start, in gxt4500_probe()
722 iounmap(par->regs); in gxt4500_probe()
736 struct gxt4500_par *par; in gxt4500_remove() local
740 par = info->par; in gxt4500_remove()
742 arch_phys_wc_del(par->wc_cookie); in gxt4500_remove()
744 iounmap(par->regs); in gxt4500_remove()