Lines Matching refs:paddr
508 wr_reg_wa(&hw->desc[0], ad->paddr); in fsl_diu_enable_panel()
512 if (hw->desc[1] != ad->paddr) { /* AOI0 closed */ in fsl_diu_enable_panel()
515 cpu_to_le32(cmfbi->ad->paddr); in fsl_diu_enable_panel()
518 wr_reg_wa(&hw->desc[1], ad->paddr); in fsl_diu_enable_panel()
523 if (hw->desc[2] != ad->paddr) { /* AOI0 closed */ in fsl_diu_enable_panel()
526 cpu_to_le32(cmfbi->ad->paddr); in fsl_diu_enable_panel()
529 wr_reg_wa(&hw->desc[2], ad->paddr); in fsl_diu_enable_panel()
535 if (hw->desc[1] == data->dummy_ad.paddr) in fsl_diu_enable_panel()
536 wr_reg_wa(&hw->desc[1], ad->paddr); in fsl_diu_enable_panel()
538 pmfbi->ad->next_ad = cpu_to_le32(ad->paddr); in fsl_diu_enable_panel()
543 if (hw->desc[2] == data->dummy_ad.paddr) in fsl_diu_enable_panel()
544 wr_reg_wa(&hw->desc[2], ad->paddr); in fsl_diu_enable_panel()
546 pmfbi->ad->next_ad = cpu_to_le32(ad->paddr); in fsl_diu_enable_panel()
565 wr_reg_wa(&hw->desc[1], cmfbi->ad->paddr); in fsl_diu_disable_panel()
568 wr_reg_wa(&hw->desc[1], data->dummy_ad.paddr); in fsl_diu_disable_panel()
574 wr_reg_wa(&hw->desc[2], cmfbi->ad->paddr); in fsl_diu_disable_panel()
577 wr_reg_wa(&hw->desc[2], data->dummy_ad.paddr); in fsl_diu_disable_panel()
582 if (hw->desc[1] != ad->paddr) { in fsl_diu_disable_panel()
588 wr_reg_wa(&hw->desc[1], data->dummy_ad.paddr); in fsl_diu_disable_panel()
593 if (hw->desc[2] != ad->paddr) { in fsl_diu_disable_panel()
599 wr_reg_wa(&hw->desc[2], data->dummy_ad.paddr); in fsl_diu_disable_panel()
1734 data->ad[i].paddr = DMA_ADDR(data, ad[i]); in fsl_diu_probe()
1777 data->dummy_ad.paddr = DMA_ADDR(data, dummy_ad); in fsl_diu_probe()
1786 out_be32(&data->diu_reg->desc[1], data->dummy_ad.paddr); in fsl_diu_probe()
1787 out_be32(&data->diu_reg->desc[2], data->dummy_ad.paddr); in fsl_diu_probe()