148 static void lcdc_write(unsigned int val, unsigned int addr)  in lcdc_write()  function
273 		lcdc_write(LCD_CLK_MAIN_RESET, LCD_CLK_RESET_REG);  in lcd_enable_raster()
278 		lcdc_write(0, LCD_CLK_RESET_REG);  in lcd_enable_raster()
284 		lcdc_write(reg | LCD_RASTER_ENABLE, LCD_RASTER_CTRL_REG);  in lcd_enable_raster()
295 		lcdc_write(reg & ~LCD_RASTER_ENABLE, LCD_RASTER_CTRL_REG);  in lcd_disable_raster()
337 			lcdc_write(reg_int, LCD_INT_ENABLE_SET_REG);  in lcd_blit()
341 		lcdc_write(start, LCD_DMA_FRM_BUF_BASE_ADDR_0_REG);  in lcd_blit()
342 		lcdc_write(end, LCD_DMA_FRM_BUF_CEILING_ADDR_0_REG);  in lcd_blit()
343 		lcdc_write(start, LCD_DMA_FRM_BUF_BASE_ADDR_1_REG);  in lcd_blit()
344 		lcdc_write(end, LCD_DMA_FRM_BUF_CEILING_ADDR_1_REG);  in lcd_blit()
356 			lcdc_write(reg_int, LCD_INT_ENABLE_SET_REG);  in lcd_blit()
359 		lcdc_write(start, LCD_DMA_FRM_BUF_BASE_ADDR_0_REG);  in lcd_blit()
360 		lcdc_write(end, LCD_DMA_FRM_BUF_CEILING_ADDR_0_REG);  in lcd_blit()
363 	lcdc_write(reg_dma, LCD_DMA_CTRL_REG);  in lcd_blit()
364 	lcdc_write(reg_ras, LCD_RASTER_CTRL_REG);  in lcd_blit()
400 	lcdc_write(reg, LCD_DMA_CTRL_REG);  in lcd_cfg_dma()
413 	lcdc_write(reg, LCD_RASTER_TIMING_2_REG);  in lcd_cfg_ac_bias()
425 	lcdc_write(reg, LCD_RASTER_TIMING_0_REG);  in lcd_cfg_horizontal_sync()
439 		lcdc_write(reg, LCD_RASTER_TIMING_2_REG);  in lcd_cfg_horizontal_sync()
452 	lcdc_write(reg, LCD_RASTER_TIMING_1_REG);  in lcd_cfg_vertical_sync()
494 		lcdc_write(reg_int, LCD_INT_ENABLE_SET_REG);  in lcd_cfg_display()
497 	lcdc_write(reg, LCD_RASTER_CTRL_REG);  in lcd_cfg_display()
518 	lcdc_write(reg, LCD_RASTER_TIMING_2_REG);  in lcd_cfg_display()
555 	lcdc_write(reg, LCD_RASTER_TIMING_0_REG);  in lcd_cfg_frame_buffer()
561 	lcdc_write(reg, LCD_RASTER_TIMING_1_REG);  in lcd_cfg_frame_buffer()
567 		lcdc_write(reg, LCD_RASTER_TIMING_2_REG);  in lcd_cfg_frame_buffer()
598 	lcdc_write(reg, LCD_RASTER_CTRL_REG);  in lcd_cfg_frame_buffer()
697 	lcdc_write(0, LCD_DMA_CTRL_REG);  in da8xx_fb_lcd_reset()
698 	lcdc_write(0, LCD_RASTER_CTRL_REG);  in da8xx_fb_lcd_reset()
701 		lcdc_write(0, LCD_INT_ENABLE_SET_REG);  in da8xx_fb_lcd_reset()
703 		lcdc_write(LCD_CLK_MAIN_RESET, LCD_CLK_RESET_REG);  in da8xx_fb_lcd_reset()
704 		lcdc_write(0, LCD_CLK_RESET_REG);  in da8xx_fb_lcd_reset()
726 	lcdc_write(LCD_CLK_DIVISOR(lcdc_clk_div) |  in da8xx_fb_config_clk_divider()
730 		lcdc_write(LCD_V2_DMA_CLK_EN | LCD_V2_LIDD_CLK_EN |  in da8xx_fb_config_clk_divider()
793 		lcdc_write((lcdc_read(LCD_RASTER_TIMING_2_REG) |  in lcd_init()
796 		lcdc_write((lcdc_read(LCD_RASTER_TIMING_2_REG) &  in lcd_init()
826 	lcdc_write((lcdc_read(LCD_RASTER_CTRL_REG) & 0xfff00fff) |  in lcd_init()
840 		lcdc_write(stat, LCD_MASKED_STAT_REG);  in lcdc_irq_handler_rev02()
851 		lcdc_write(stat, LCD_MASKED_STAT_REG);  in lcdc_irq_handler_rev02()
854 		lcdc_write(LCD_V2_PL_INT_ENA, LCD_INT_ENABLE_CLR_REG);  in lcdc_irq_handler_rev02()
859 		lcdc_write(stat, LCD_MASKED_STAT_REG);  in lcdc_irq_handler_rev02()
863 			lcdc_write(par->dma_start,  in lcdc_irq_handler_rev02()
865 			lcdc_write(par->dma_end,  in lcdc_irq_handler_rev02()
873 			lcdc_write(par->dma_start,  in lcdc_irq_handler_rev02()
875 			lcdc_write(par->dma_end,  in lcdc_irq_handler_rev02()
890 	lcdc_write(0, LCD_END_OF_INT_IND_REG);  in lcdc_irq_handler_rev02()
903 		lcdc_write(stat, LCD_STAT_REG);  in lcdc_irq_handler_rev01()
914 		lcdc_write(stat, LCD_STAT_REG);  in lcdc_irq_handler_rev01()
919 		lcdc_write(reg_ras, LCD_RASTER_CTRL_REG);  in lcdc_irq_handler_rev01()
924 		lcdc_write(stat, LCD_STAT_REG);  in lcdc_irq_handler_rev01()
928 			lcdc_write(par->dma_start,  in lcdc_irq_handler_rev01()
930 			lcdc_write(par->dma_end,  in lcdc_irq_handler_rev01()
938 			lcdc_write(par->dma_start,  in lcdc_irq_handler_rev01()
940 			lcdc_write(par->dma_end,  in lcdc_irq_handler_rev01()
1093 		lcdc_write(0, LCD_RASTER_CTRL_REG);  in fb_remove()
1096 		lcdc_write(0, LCD_DMA_CTRL_REG);  in fb_remove()
1248 				lcdc_write(par->dma_start,  in da8xx_pan_display()
1250 				lcdc_write(par->dma_end,  in da8xx_pan_display()
1253 				lcdc_write(par->dma_start,  in da8xx_pan_display()
1255 				lcdc_write(par->dma_end,  in da8xx_pan_display()
1295 	lcdc_write(par->dma_start, LCD_DMA_FRM_BUF_BASE_ADDR_0_REG);  in da8xxfb_set_par()
1296 	lcdc_write(par->dma_end, LCD_DMA_FRM_BUF_CEILING_ADDR_0_REG);  in da8xxfb_set_par()
1297 	lcdc_write(par->dma_start, LCD_DMA_FRM_BUF_BASE_ADDR_1_REG);  in da8xxfb_set_par()
1298 	lcdc_write(par->dma_end, LCD_DMA_FRM_BUF_CEILING_ADDR_1_REG);  in da8xxfb_set_par()
1594 		lcdc_write(reg_context.clk_enable, LCD_CLK_ENABLE_REG);  in lcd_context_restore()
1595 		lcdc_write(reg_context.int_enable_set, LCD_INT_ENABLE_SET_REG);  in lcd_context_restore()
1598 	lcdc_write(reg_context.ctrl, LCD_CTRL_REG);  in lcd_context_restore()
1599 	lcdc_write(reg_context.dma_ctrl, LCD_DMA_CTRL_REG);  in lcd_context_restore()
1600 	lcdc_write(reg_context.raster_timing_0, LCD_RASTER_TIMING_0_REG);  in lcd_context_restore()
1601 	lcdc_write(reg_context.raster_timing_1, LCD_RASTER_TIMING_1_REG);  in lcd_context_restore()
1602 	lcdc_write(reg_context.raster_timing_2, LCD_RASTER_TIMING_2_REG);  in lcd_context_restore()
1603 	lcdc_write(reg_context.dma_frm_buf_base_addr_0,  in lcd_context_restore()
1605 	lcdc_write(reg_context.dma_frm_buf_ceiling_addr_0,  in lcd_context_restore()
1607 	lcdc_write(reg_context.dma_frm_buf_base_addr_1,  in lcd_context_restore()
1609 	lcdc_write(reg_context.dma_frm_buf_ceiling_addr_1,  in lcd_context_restore()
1611 	lcdc_write(reg_context.raster_ctrl, LCD_RASTER_CTRL_REG);  in lcd_context_restore()