Lines Matching refs:mclk
306 static int mclk; variable
368 int pll, mclk, xclk, ecp_max; member
456 par->pll_limits.mclk = aty_chips[i].mclk; in correct_chipset()
484 par->pll_limits.mclk = 67; in correct_chipset()
492 par->pll_limits.mclk = 67; in correct_chipset()
502 par->pll_limits.mclk = 67; in correct_chipset()
510 par->pll_limits.mclk = 67; in correct_chipset()
522 par->pll_limits.mclk = 67; in correct_chipset()
530 par->pll_limits.mclk = 67; in correct_chipset()
2430 if (par->pll_limits.mclk == 67 && par->ram_type < SDRAM) in aty_init()
2431 par->pll_limits.mclk = 63; in aty_init()
2443 par->pll_limits.mclk = 70; in aty_init()
2451 if (mclk) in aty_init()
2452 par->pll_limits.mclk = mclk; in aty_init()
2458 par->mclk_per = 1000000/par->pll_limits.mclk; in aty_init()
2584 par->pll_limits.pll_max, par->pll_limits.mclk, in aty_init()
3406 par->pll_limits.mclk = pll_block.MCLK_max_freq/100; in init_from_bios()
3852 mclk = simple_strtoul(this_opt + 5, NULL, 0); in atyfb_setup()
4008 module_param(mclk, int, 0);
4009 MODULE_PARM_DESC(mclk, "int: override memory clock");