Lines Matching refs:aty_st_pll
570 #define aty_st_pll(pll_index, val) _aty_st_pll(pll_index, val, par) macro
617 aty_st_pll(PPLL_REF_DIV, in aty_pll_writeupdate()
713 aty_st_pll(MCLK_CNTL, mclk_cntl | 0x00030000); in aty128_reset_engine()
721 aty_st_pll(MCLK_CNTL, mclk_cntl); in aty128_reset_engine()
989 aty_st_pll(X_MPLL_REF_FB_DIV, 0x004c4c1e); in aty128_timings()
992 aty_st_pll(PPLL_REF_DIV, par->constants.ref_divider); in aty128_timings()
1040 aty_st_pll(PPLL_CNTL, aty_ld_pll(PPLL_CNTL) & ~(0x00030000)); in aty128_set_crtc()
1343 aty_st_pll(PPLL_CNTL, in aty128_set_pll()
1348 aty_st_pll(PPLL_REF_DIV, par->constants.ref_divider & 0x3ff); in aty128_set_pll()
1359 aty_st_pll(PPLL_DIV_3, div3); in aty128_set_pll()
1363 aty_st_pll(HTOTAL_CNTL, 0); /* no horiz crtc adjustment */ in aty128_set_pll()
1367 aty_st_pll(PPLL_CNTL, aty_ld_pll(PPLL_CNTL) & ~PPLL_RESET); in aty128_set_pll()
2442 aty_st_pll(POWER_MANAGEMENT, pmgt); in aty128_set_suspend()