Lines Matching refs:par
149 struct arkfb_info *par = info->par; in arkfb_tilecursor() local
151 svga_tilecursor(par->state.vgabase, info, cursor); in arkfb_tilecursor()
463 struct arkfb_info *par; in ark_dac_read_regs() local
466 par = info->par; in ark_dac_read_regs()
467 regval = vga_rseq(par->state.vgabase, 0x1C); in ark_dac_read_regs()
470 vga_wseq(par->state.vgabase, 0x1C, regval | (code[0] & 4 ? 0x80 : 0)); in ark_dac_read_regs()
471 code[1] = vga_r(par->state.vgabase, dac_regs[code[0] & 3]); in ark_dac_read_regs()
476 vga_wseq(par->state.vgabase, 0x1C, regval); in ark_dac_read_regs()
482 struct arkfb_info *par; in ark_dac_write_regs() local
485 par = info->par; in ark_dac_write_regs()
486 regval = vga_rseq(par->state.vgabase, 0x1C); in ark_dac_write_regs()
489 vga_wseq(par->state.vgabase, 0x1C, regval | (code[0] & 4 ? 0x80 : 0)); in ark_dac_write_regs()
490 vga_w(par->state.vgabase, dac_regs[code[0] & 3], code[1]); in ark_dac_write_regs()
495 vga_wseq(par->state.vgabase, 0x1C, regval); in ark_dac_write_regs()
501 struct arkfb_info *par = info->par; in ark_set_pixclock() local
504 int rv = dac_set_freq(par->dac, 0, 1000000000 / pixclock); in ark_set_pixclock()
511 regval = vga_r(par->state.vgabase, VGA_MIS_R); in ark_set_pixclock()
512 vga_w(par->state.vgabase, VGA_MIS_W, regval | VGA_MIS_ENB_PLL_LOAD); in ark_set_pixclock()
520 struct arkfb_info *par = info->par; in arkfb_open() local
522 mutex_lock(&(par->open_lock)); in arkfb_open()
523 if (par->ref_count == 0) { in arkfb_open()
524 void __iomem *vgabase = par->state.vgabase; in arkfb_open()
526 memset(&(par->state), 0, sizeof(struct vgastate)); in arkfb_open()
527 par->state.vgabase = vgabase; in arkfb_open()
528 par->state.flags = VGA_SAVE_MODE | VGA_SAVE_FONTS | VGA_SAVE_CMAP; in arkfb_open()
529 par->state.num_crtc = 0x60; in arkfb_open()
530 par->state.num_seq = 0x30; in arkfb_open()
531 save_vga(&(par->state)); in arkfb_open()
534 par->ref_count++; in arkfb_open()
535 mutex_unlock(&(par->open_lock)); in arkfb_open()
544 struct arkfb_info *par = info->par; in arkfb_release() local
546 mutex_lock(&(par->open_lock)); in arkfb_release()
547 if (par->ref_count == 0) { in arkfb_release()
548 mutex_unlock(&(par->open_lock)); in arkfb_release()
552 if (par->ref_count == 1) { in arkfb_release()
553 restore_vga(&(par->state)); in arkfb_release()
554 dac_set_mode(par->dac, DAC_PSEUDO8_8); in arkfb_release()
557 par->ref_count--; in arkfb_release()
558 mutex_unlock(&(par->open_lock)); in arkfb_release()
616 struct arkfb_info *par = info->par; in arkfb_set_par() local
654 svga_wcrt_mask(par->state.vgabase, 0x11, 0x00, 0x80); in arkfb_set_par()
657 svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); in arkfb_set_par()
658 svga_wcrt_mask(par->state.vgabase, 0x17, 0x00, 0x80); in arkfb_set_par()
661 svga_set_default_gfx_regs(par->state.vgabase); in arkfb_set_par()
662 svga_set_default_atc_regs(par->state.vgabase); in arkfb_set_par()
663 svga_set_default_seq_regs(par->state.vgabase); in arkfb_set_par()
664 svga_set_default_crt_regs(par->state.vgabase); in arkfb_set_par()
665 svga_wcrt_multi(par->state.vgabase, ark_line_compare_regs, 0xFFFFFFFF); in arkfb_set_par()
666 svga_wcrt_multi(par->state.vgabase, ark_start_address_regs, 0); in arkfb_set_par()
669 …svga_wseq_mask(par->state.vgabase, 0x10, 0x1F, 0x1F); /* enable linear framebuffer and full memory… in arkfb_set_par()
670 svga_wseq_mask(par->state.vgabase, 0x12, 0x03, 0x03); /* 4 MB linear framebuffer size */ in arkfb_set_par()
672 vga_wseq(par->state.vgabase, 0x13, info->fix.smem_start >> 16); in arkfb_set_par()
673 vga_wseq(par->state.vgabase, 0x14, info->fix.smem_start >> 24); in arkfb_set_par()
674 vga_wseq(par->state.vgabase, 0x15, 0); in arkfb_set_par()
675 vga_wseq(par->state.vgabase, 0x16, 0); in arkfb_set_par()
680 vga_wseq(par->state.vgabase, 0x18, regval); in arkfb_set_par()
684 svga_wcrt_multi(par->state.vgabase, ark_offset_regs, offset_value); in arkfb_set_par()
687 svga_wcrt_mask(par->state.vgabase, 0x40, 0x08, 0x08); in arkfb_set_par()
690 svga_wcrt_mask(par->state.vgabase, 0x09, 0x80, 0x80); in arkfb_set_par()
692 svga_wcrt_mask(par->state.vgabase, 0x09, 0x00, 0x80); in arkfb_set_par()
695 svga_wcrt_mask(par->state.vgabase, 0x44, 0x04, 0x04); in arkfb_set_par()
697 svga_wcrt_mask(par->state.vgabase, 0x44, 0x00, 0x04); in arkfb_set_par()
707 svga_set_textmode_vga_regs(par->state.vgabase); in arkfb_set_par()
709 vga_wseq(par->state.vgabase, 0x11, 0x10); /* basic VGA mode */ in arkfb_set_par()
710 svga_wcrt_mask(par->state.vgabase, 0x46, 0x00, 0x04); /* 8bit pixel path */ in arkfb_set_par()
711 dac_set_mode(par->dac, DAC_PSEUDO8_8); in arkfb_set_par()
716 vga_wgfx(par->state.vgabase, VGA_GFX_MODE, 0x40); in arkfb_set_par()
718 vga_wseq(par->state.vgabase, 0x11, 0x10); /* basic VGA mode */ in arkfb_set_par()
719 svga_wcrt_mask(par->state.vgabase, 0x46, 0x00, 0x04); /* 8bit pixel path */ in arkfb_set_par()
720 dac_set_mode(par->dac, DAC_PSEUDO8_8); in arkfb_set_par()
725 vga_wseq(par->state.vgabase, 0x11, 0x10); /* basic VGA mode */ in arkfb_set_par()
726 svga_wcrt_mask(par->state.vgabase, 0x46, 0x00, 0x04); /* 8bit pixel path */ in arkfb_set_par()
727 dac_set_mode(par->dac, DAC_PSEUDO8_8); in arkfb_set_par()
732 vga_wseq(par->state.vgabase, 0x11, 0x16); /* 8bpp accel mode */ in arkfb_set_par()
736 svga_wcrt_mask(par->state.vgabase, 0x46, 0x00, 0x04); /* 8bit pixel path */ in arkfb_set_par()
737 dac_set_mode(par->dac, DAC_PSEUDO8_8); in arkfb_set_par()
740 svga_wcrt_mask(par->state.vgabase, 0x46, 0x04, 0x04); /* 16bit pixel path */ in arkfb_set_par()
741 dac_set_mode(par->dac, DAC_PSEUDO8_16); in arkfb_set_par()
748 vga_wseq(par->state.vgabase, 0x11, 0x1A); /* 16bpp accel mode */ in arkfb_set_par()
749 svga_wcrt_mask(par->state.vgabase, 0x46, 0x04, 0x04); /* 16bit pixel path */ in arkfb_set_par()
750 dac_set_mode(par->dac, DAC_RGB1555_16); in arkfb_set_par()
755 vga_wseq(par->state.vgabase, 0x11, 0x1A); /* 16bpp accel mode */ in arkfb_set_par()
756 svga_wcrt_mask(par->state.vgabase, 0x46, 0x04, 0x04); /* 16bit pixel path */ in arkfb_set_par()
757 dac_set_mode(par->dac, DAC_RGB0565_16); in arkfb_set_par()
762 vga_wseq(par->state.vgabase, 0x11, 0x16); /* 8bpp accel mode ??? */ in arkfb_set_par()
763 svga_wcrt_mask(par->state.vgabase, 0x46, 0x04, 0x04); /* 16bit pixel path */ in arkfb_set_par()
764 dac_set_mode(par->dac, DAC_RGB0888_16); in arkfb_set_par()
771 vga_wseq(par->state.vgabase, 0x11, 0x1E); /* 32bpp accel mode */ in arkfb_set_par()
772 svga_wcrt_mask(par->state.vgabase, 0x46, 0x04, 0x04); /* 16bit pixel path */ in arkfb_set_par()
773 dac_set_mode(par->dac, DAC_RGB8888_16); in arkfb_set_par()
782 svga_set_timings(par->state.vgabase, &ark_timing_regs, &(info->var), hmul, hdiv, in arkfb_set_par()
790 vga_wcrt(par->state.vgabase, 0x42, (value + 1) / 2); in arkfb_set_par()
794 svga_wcrt_mask(par->state.vgabase, 0x17, 0x80, 0x80); in arkfb_set_par()
795 svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20); in arkfb_set_par()
865 struct arkfb_info *par = info->par; in arkfb_blank() local
870 svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20); in arkfb_blank()
871 svga_wcrt_mask(par->state.vgabase, 0x17, 0x80, 0x80); in arkfb_blank()
875 svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); in arkfb_blank()
876 svga_wcrt_mask(par->state.vgabase, 0x17, 0x80, 0x80); in arkfb_blank()
882 svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); in arkfb_blank()
883 svga_wcrt_mask(par->state.vgabase, 0x17, 0x00, 0x80); in arkfb_blank()
894 struct arkfb_info *par = info->par; in arkfb_pan_display() local
909 svga_wcrt_multi(par->state.vgabase, ark_start_address_regs, offset); in arkfb_pan_display()
945 struct arkfb_info *par; in ark_pci_probe() local
962 par = info->par; in ark_pci_probe()
963 mutex_init(&par->open_lock); in ark_pci_probe()
981 par->dac = ics5342_init(ark_dac_read_regs, ark_dac_write_regs, info); in ark_pci_probe()
982 if (! par->dac) { in ark_pci_probe()
1006 par->state.vgabase = (void __iomem *) (unsigned long) vga_res.start; in ark_pci_probe()
1009 regval = vga_rseq(par->state.vgabase, 0x10); in ark_pci_probe()
1020 info->pseudo_palette = (void*) (par->pseudo_palette); in ark_pci_probe()
1047 par->wc_cookie = arch_phys_wc_add(info->fix.smem_start, in ark_pci_probe()
1058 dac_release(par->dac); in ark_pci_probe()
1075 struct arkfb_info *par = info->par; in ark_pci_remove() local
1076 arch_phys_wc_del(par->wc_cookie); in ark_pci_remove()
1077 dac_release(par->dac); in ark_pci_remove()
1096 struct arkfb_info *par = info->par; in ark_pci_suspend() local
1101 mutex_lock(&(par->open_lock)); in ark_pci_suspend()
1103 if ((state.event == PM_EVENT_FREEZE) || (par->ref_count == 0)) { in ark_pci_suspend()
1104 mutex_unlock(&(par->open_lock)); in ark_pci_suspend()
1115 mutex_unlock(&(par->open_lock)); in ark_pci_suspend()
1127 struct arkfb_info *par = info->par; in ark_pci_resume() local
1132 mutex_lock(&(par->open_lock)); in ark_pci_resume()
1134 if (par->ref_count == 0) in ark_pci_resume()
1149 mutex_unlock(&(par->open_lock)); in ark_pci_resume()