992 	u16			rx_csr, tx_csr;  in musb_bulk_nak_timeout()  local
1009 		tx_csr = musb_readw(epio, MUSB_TXCSR);  in musb_bulk_nak_timeout()
1010 		tx_csr |= MUSB_TXCSR_H_WZC_BITS;  in musb_bulk_nak_timeout()
1011 		tx_csr &= ~MUSB_TXCSR_H_NAKTIMEOUT;  in musb_bulk_nak_timeout()
1012 		musb_writew(epio, MUSB_TXCSR, tx_csr);  in musb_bulk_nak_timeout()
1274 	u16			tx_csr;  in musb_host_tx()  local
1287 	tx_csr = musb_readw(epio, MUSB_TXCSR);  in musb_host_tx()
1291 		dev_dbg(musb->controller, "extra TX%d ready, csr %04x\n", epnum, tx_csr);  in musb_host_tx()
1297 	dev_dbg(musb->controller, "OUT/TX%d end, csr %04x%s\n", epnum, tx_csr,  in musb_host_tx()
1301 	if (tx_csr & MUSB_TXCSR_H_RXSTALL) {  in musb_host_tx()
1308 	} else if (tx_csr & MUSB_TXCSR_H_ERROR) {  in musb_host_tx()
1314 	} else if (tx_csr & MUSB_TXCSR_H_NAKTIMEOUT) {  in musb_host_tx()
1350 		tx_csr &= ~(MUSB_TXCSR_AUTOSET  in musb_host_tx()
1358 		musb_writew(epio, MUSB_TXCSR, tx_csr);  in musb_host_tx()
1360 		musb_writew(epio, MUSB_TXCSR, tx_csr);  in musb_host_tx()
1368 		dev_dbg(musb->controller, "extra TX%d ready, csr %04x\n", epnum, tx_csr);  in musb_host_tx()
1381 		if (tx_csr & MUSB_TXCSR_DMAMODE) {  in musb_host_tx()
1398 			tx_csr &= musb_readw(epio, MUSB_TXCSR);  in musb_host_tx()
1399 			if (tx_csr & MUSB_TXCSR_TXPKTRDY) {  in musb_host_tx()
1400 				tx_csr &= ~(MUSB_TXCSR_DMAENAB |  in musb_host_tx()
1403 					    tx_csr | MUSB_TXCSR_H_WZC_BITS);  in musb_host_tx()
1405 			tx_csr &= ~(MUSB_TXCSR_DMAMODE |  in musb_host_tx()
1408 				    tx_csr | MUSB_TXCSR_H_WZC_BITS);  in musb_host_tx()
1416 			tx_csr = musb_readw(epio, MUSB_TXCSR);  in musb_host_tx()
1426 		if (tx_csr & (MUSB_TXCSR_FIFONOTEMPTY | MUSB_TXCSR_TXPKTRDY)) {  in musb_host_tx()
1428 			    "CSR %04x\n", tx_csr);  in musb_host_tx()
1493 	} else	if (tx_csr & MUSB_TXCSR_DMAENAB) {  in musb_host_tx()