Lines Matching refs:musb
97 struct musb *hcd_to_musb(struct usb_hcd *hcd) in hcd_to_musb()
99 return *(struct musb **) hcd->hcd_priv; in hcd_to_musb()
103 static void musb_ep_program(struct musb *musb, u8 epnum,
112 struct musb *musb = ep->musb; in musb_h_tx_flush_fifo() local
137 if (dev_WARN_ONCE(musb->controller, retries-- < 1, in musb_h_tx_flush_fifo()
194 if (is_cppi_enabled(ep->musb)) in musb_h_tx_dma_start()
219 musb_start_urb(struct musb *musb, int is_in, struct musb_qh *qh) in musb_start_urb() argument
223 void __iomem *mbase = musb->mregs; in musb_start_urb()
241 musb->ep0_stage = MUSB_EP0_START; in musb_start_urb()
257 dev_dbg(musb->controller, "qh %p urb %p dev%d ep%d%s%s, hw_ep %d, %p/%d\n", in musb_start_urb()
270 musb_ep_program(musb, epnum, urb, !is_in, buf, offset, len); in musb_start_urb()
280 dev_dbg(musb->controller, "check whether there's still time for periodic Tx\n"); in musb_start_urb()
294 dev_dbg(musb->controller, "SOF for %d\n", epnum); in musb_start_urb()
302 dev_dbg(musb->controller, "Start TX%d %s\n", epnum, in musb_start_urb()
307 else if (is_cppi_enabled(musb) || tusb_dma_omap(musb)) in musb_start_urb()
313 static void musb_giveback(struct musb *musb, struct urb *urb, int status) in musb_giveback() argument
314 __releases(musb->lock) in musb_giveback()
315 __acquires(musb->lock) in musb_giveback()
317 dev_dbg(musb->controller, in musb_giveback()
326 usb_hcd_unlink_urb_from_ep(musb->hcd, urb); in musb_giveback()
327 spin_unlock(&musb->lock); in musb_giveback()
328 usb_hcd_giveback_urb(musb->hcd, urb, status); in musb_giveback()
329 spin_lock(&musb->lock); in musb_giveback()
359 static void musb_advance_schedule(struct musb *musb, struct urb *urb, in musb_advance_schedule() argument
382 musb_giveback(musb, urb, status); in musb_advance_schedule()
390 struct dma_controller *dma = musb->dma_controller; in musb_advance_schedule()
438 dev_dbg(musb->controller, "... next ep%d %cX urb %p\n", in musb_advance_schedule()
440 musb_start_urb(musb, is_in, qh); in musb_advance_schedule()
467 musb_host_packet_rx(struct musb *musb, struct urb *urb, u8 epnum, u8 iso_err) in musb_host_packet_rx() argument
475 struct musb_hw_ep *hw_ep = musb->endpoints + epnum; in musb_host_packet_rx()
483 dev_dbg(musb->controller, "RX%d count %d, buffer %p len %d/%d\n", epnum, rx_count, in musb_host_packet_rx()
505 dev_dbg(musb->controller, "** OVERFLOW %d into %d\n", rx_count, length); in musb_host_packet_rx()
523 dev_dbg(musb->controller, "** OVERFLOW %d into %d\n", rx_count, length); in musb_host_packet_rx()
568 musb_rx_reinit(struct musb *musb, struct musb_qh *qh, u8 epnum) in musb_rx_reinit() argument
570 struct musb_hw_ep *ep = musb->endpoints + epnum; in musb_rx_reinit()
607 if (musb->is_multipoint) { in musb_rx_reinit()
608 musb_write_rxfunaddr(musb, epnum, qh->addr_reg); in musb_rx_reinit()
609 musb_write_rxhubaddr(musb, epnum, qh->h_addr_reg); in musb_rx_reinit()
610 musb_write_rxhubport(musb, epnum, qh->h_port_reg); in musb_rx_reinit()
612 musb_writeb(musb->mregs, MUSB_FADDR, qh->addr_reg); in musb_rx_reinit()
621 if (musb->double_buffer_not_ok) in musb_rx_reinit()
658 can_bulk_split(hw_ep->musb, qh->type))) in musb_tx_dma_set_mode_mentor()
681 if (!is_cppi_enabled(hw_ep->musb) && !tusb_dma_omap(hw_ep->musb)) in musb_tx_dma_set_mode_cppi_tusb()
704 if (musb_dma_inventra(hw_ep->musb) || musb_dma_ux500(hw_ep->musb)) in musb_tx_dma_program()
741 static void musb_ep_program(struct musb *musb, u8 epnum, in musb_ep_program() argument
748 void __iomem *mbase = musb->mregs; in musb_ep_program()
749 struct musb_hw_ep *hw_ep = musb->endpoints + epnum; in musb_ep_program()
756 dev_dbg(musb->controller, "%s hw%d urb %p spd%d dev%d ep%d%s " in musb_ep_program()
775 dma_controller = musb->dma_controller; in musb_ep_program()
800 int_txe = musb->intrtxe; in musb_ep_program()
848 if (musb->is_multipoint) { in musb_ep_program()
849 musb_write_txfunaddr(musb, epnum, qh->addr_reg); in musb_ep_program()
850 musb_write_txhubaddr(musb, epnum, qh->h_addr_reg); in musb_ep_program()
851 musb_write_txhubport(musb, epnum, qh->h_port_reg); in musb_ep_program()
859 if (musb->double_buffer_not_ok) { in musb_ep_program()
862 } else if (can_bulk_split(musb, qh->type)) { in musb_ep_program()
875 if (musb->is_multipoint) in musb_ep_program()
880 if (can_bulk_split(musb, qh->type)) in musb_ep_program()
898 dev_err(musb->controller, in musb_ep_program()
923 musb_rx_reinit(musb, qh, epnum); in musb_ep_program()
949 if ((is_cppi_enabled(musb) || tusb_dma_omap(musb)) && dma_channel) { in musb_ep_program()
975 dev_dbg(musb->controller, "RXCSR%d := %04x\n", epnum, csr); in musb_ep_program()
984 static void musb_bulk_nak_timeout(struct musb *musb, struct musb_hw_ep *ep, in musb_bulk_nak_timeout() argument
989 void __iomem *mbase = musb->mregs; in musb_bulk_nak_timeout()
1004 cur_qh = first_qh(&musb->in_bulk); in musb_bulk_nak_timeout()
1014 cur_qh = first_qh(&musb->out_bulk); in musb_bulk_nak_timeout()
1020 musb->dma_controller->channel_abort(dma); in musb_bulk_nak_timeout()
1028 list_move_tail(&cur_qh->ring, &musb->in_bulk); in musb_bulk_nak_timeout()
1031 next_qh = first_qh(&musb->in_bulk); in musb_bulk_nak_timeout()
1037 list_move_tail(&cur_qh->ring, &musb->out_bulk); in musb_bulk_nak_timeout()
1040 next_qh = first_qh(&musb->out_bulk); in musb_bulk_nak_timeout()
1045 musb_start_urb(musb, is_in, next_qh); in musb_bulk_nak_timeout()
1053 static bool musb_h_ep0_continue(struct musb *musb, u16 len, struct urb *urb) in musb_h_ep0_continue() argument
1058 struct musb_hw_ep *hw_ep = musb->control_ep; in musb_h_ep0_continue()
1062 switch (musb->ep0_stage) { in musb_h_ep0_continue()
1085 dev_dbg(musb->controller, "start no-DATA\n"); in musb_h_ep0_continue()
1088 dev_dbg(musb->controller, "start IN-DATA\n"); in musb_h_ep0_continue()
1089 musb->ep0_stage = MUSB_EP0_IN; in musb_h_ep0_continue()
1093 dev_dbg(musb->controller, "start OUT-DATA\n"); in musb_h_ep0_continue()
1094 musb->ep0_stage = MUSB_EP0_OUT; in musb_h_ep0_continue()
1105 dev_dbg(musb->controller, "Sending %d byte%s to ep0 fifo %p\n", in musb_h_ep0_continue()
1116 ERR("bogus ep0 stage %d\n", musb->ep0_stage); in musb_h_ep0_continue()
1129 irqreturn_t musb_h_ep0_irq(struct musb *musb) in musb_h_ep0_irq() argument
1134 void __iomem *mbase = musb->mregs; in musb_h_ep0_irq()
1135 struct musb_hw_ep *hw_ep = musb->control_ep; in musb_h_ep0_irq()
1150 dev_dbg(musb->controller, "<== csr0 %04x, qh %p, count %d, urb %p, stage %d\n", in musb_h_ep0_irq()
1151 csr, qh, len, urb, musb->ep0_stage); in musb_h_ep0_irq()
1154 if (MUSB_EP0_STATUS == musb->ep0_stage) { in musb_h_ep0_irq()
1161 dev_dbg(musb->controller, "STALLING ENDPOINT\n"); in musb_h_ep0_irq()
1165 dev_dbg(musb->controller, "no response, csr0 %04x\n", csr); in musb_h_ep0_irq()
1169 dev_dbg(musb->controller, "control NAK timeout\n"); in musb_h_ep0_irq()
1184 dev_dbg(musb->controller, "aborting\n"); in musb_h_ep0_irq()
1217 if (musb_h_ep0_continue(musb, len, urb)) { in musb_h_ep0_irq()
1219 csr = (MUSB_EP0_IN == musb->ep0_stage) in musb_h_ep0_irq()
1235 musb->ep0_stage = MUSB_EP0_STATUS; in musb_h_ep0_irq()
1237 dev_dbg(musb->controller, "ep0 STATUS, csr %04x\n", csr); in musb_h_ep0_irq()
1243 musb->ep0_stage = MUSB_EP0_IDLE; in musb_h_ep0_irq()
1247 musb_advance_schedule(musb, urb, hw_ep, 1); in musb_h_ep0_irq()
1270 void musb_host_tx(struct musb *musb, u8 epnum) in musb_host_tx() argument
1277 struct musb_hw_ep *hw_ep = musb->endpoints + epnum; in musb_host_tx()
1282 void __iomem *mbase = musb->mregs; in musb_host_tx()
1291 dev_dbg(musb->controller, "extra TX%d ready, csr %04x\n", epnum, tx_csr); in musb_host_tx()
1297 dev_dbg(musb->controller, "OUT/TX%d end, csr %04x%s\n", epnum, tx_csr, in musb_host_tx()
1303 dev_dbg(musb->controller, "TX end %d stall\n", epnum); in musb_host_tx()
1310 dev_dbg(musb->controller, "TX 3strikes on ep=%d\n", epnum); in musb_host_tx()
1316 && !list_is_singular(&musb->out_bulk)) { in musb_host_tx()
1317 dev_dbg(musb->controller, in musb_host_tx()
1319 musb_bulk_nak_timeout(musb, hw_ep, 0); in musb_host_tx()
1321 dev_dbg(musb->controller, in musb_host_tx()
1343 musb->dma_controller->channel_abort(dma); in musb_host_tx()
1368 dev_dbg(musb->controller, "extra TX%d ready, csr %04x\n", epnum, tx_csr); in musb_host_tx()
1427 dev_dbg(musb->controller, "DMA complete but packet still in FIFO, " in musb_host_tx()
1484 musb_advance_schedule(musb, urb, hw_ep, USB_DIR_OUT); in musb_host_tx()
1487 if (musb_tx_dma_program(musb->dma_controller, hw_ep, qh, urb, in musb_host_tx()
1489 if (is_cppi_enabled(musb) || tusb_dma_omap(musb)) in musb_host_tx()
1494 dev_dbg(musb->controller, "not complete, but DMA enabled?\n"); in musb_host_tx()
1508 usb_hcd_unmap_urb_for_dma(musb->hcd, urb); in musb_host_tx()
1520 dev_err(musb->controller, "error: sg list empty\n"); in musb_host_tx()
1651 if (musb_dma_cppi41(hw_ep->musb)) in musb_rx_dma_inventra_cppi41()
1698 struct musb *musb = hw_ep->musb; in musb_rx_dma_in_inventra_cppi41() local
1723 dev_dbg(musb->controller, "** OVERFLOW %d into %d\n", in musb_rx_dma_in_inventra_cppi41()
1815 void musb_host_rx(struct musb *musb, u8 epnum) in musb_host_rx() argument
1818 struct musb_hw_ep *hw_ep = musb->endpoints + epnum; in musb_host_rx()
1819 struct dma_controller *c = musb->dma_controller; in musb_host_rx()
1823 void __iomem *mbase = musb->mregs; in musb_host_rx()
1847 dev_dbg(musb->controller, "BOGUS RX%d ready, csr %04x, count %d\n", epnum, val, in musb_host_rx()
1855 dev_dbg(musb->controller, "<== hw %d rxcsr %04x, urb actual %d (+dma %zu)\n", in musb_host_rx()
1862 dev_dbg(musb->controller, "RX end %d STALL\n", epnum); in musb_host_rx()
1868 dev_dbg(musb->controller, "end %d RX proto error\n", epnum); in musb_host_rx()
1876 dev_dbg(musb->controller, "RX end %d NAK timeout\n", epnum); in musb_host_rx()
1888 && !list_is_singular(&musb->in_bulk)) { in musb_host_rx()
1889 musb_bulk_nak_timeout(musb, hw_ep, 1); in musb_host_rx()
1899 dev_dbg(musb->controller, "RX end %d ISO data error\n", epnum); in musb_host_rx()
1904 dev_dbg(musb->controller, "end %d high bandwidth incomplete ISO packet RX\n", in musb_host_rx()
1914 musb->dma_controller->channel_abort(dma); in musb_host_rx()
1935 if (!musb_dma_inventra(musb) && !musb_dma_ux500(musb) && in musb_host_rx()
1944 musb->dma_controller->channel_abort(dma); in musb_host_rx()
1949 dev_dbg(musb->controller, "RXCSR%d %04x, reqpkt, len %zu%s\n", epnum, rx_csr, in musb_host_rx()
1967 if (musb_dma_inventra(musb) || musb_dma_ux500(musb) || in musb_host_rx()
1968 musb_dma_cppi41(musb)) { in musb_host_rx()
1970 dev_dbg(hw_ep->musb->controller, in musb_host_rx()
1996 if ((musb_dma_inventra(musb) || musb_dma_ux500(musb) || in musb_host_rx()
1997 musb_dma_cppi41(musb)) && dma) { in musb_host_rx()
1998 dev_dbg(hw_ep->musb->controller, in musb_host_rx()
2012 dev_err(musb->controller, "error: rx_dma failed\n"); in musb_host_rx()
2019 usb_hcd_unmap_urb_for_dma(musb->hcd, urb); in musb_host_rx()
2033 dev_err(musb->controller, "error: sg list empty\n"); in musb_host_rx()
2042 done = musb_host_packet_rx(musb, urb, epnum, in musb_host_rx()
2050 done = musb_host_packet_rx(musb, urb, in musb_host_rx()
2053 dev_dbg(musb->controller, "read %spacket\n", done ? "last " : ""); in musb_host_rx()
2066 musb_advance_schedule(musb, urb, hw_ep, USB_DIR_IN); in musb_host_rx()
2076 struct musb *musb, in musb_schedule() argument
2091 head = &musb->control; in musb_schedule()
2092 hw_ep = musb->control_ep; in musb_schedule()
2108 for (epnum = 1, hw_ep = musb->endpoints + 1; in musb_schedule()
2109 epnum < musb->nr_endpoints; in musb_schedule()
2116 if (hw_ep == musb->bulk_ep) in musb_schedule()
2139 hw_ep = musb->endpoints + epnum; in musb_schedule()
2153 hw_ep = musb->bulk_ep; in musb_schedule()
2155 head = &musb->in_bulk; in musb_schedule()
2157 head = &musb->out_bulk; in musb_schedule()
2176 hw_ep = musb->endpoints + best_end; in musb_schedule()
2177 dev_dbg(musb->controller, "qh %p periodic slot %d\n", qh, best_end); in musb_schedule()
2187 musb_start_urb(musb, is_in, qh); in musb_schedule()
2197 struct musb *musb = hcd_to_musb(hcd); in musb_urb_enqueue() local
2206 if (!is_host_active(musb) || !musb->is_active) in musb_urb_enqueue()
2209 spin_lock_irqsave(&musb->lock, flags); in musb_urb_enqueue()
2214 spin_unlock_irqrestore(&musb->lock, flags); in musb_urb_enqueue()
2235 spin_lock_irqsave(&musb->lock, flags); in musb_urb_enqueue()
2237 spin_unlock_irqrestore(&musb->lock, flags); in musb_urb_enqueue()
2258 ok = (usb_pipein(urb->pipe) && musb->hb_iso_rx) in musb_urb_enqueue()
2259 || (usb_pipeout(urb->pipe) && musb->hb_iso_tx); in musb_urb_enqueue()
2322 if (musb->is_multipoint) { in musb_urb_enqueue()
2344 spin_lock_irqsave(&musb->lock, flags); in musb_urb_enqueue()
2353 ret = musb_schedule(musb, qh, in musb_urb_enqueue()
2362 spin_unlock_irqrestore(&musb->lock, flags); in musb_urb_enqueue()
2366 spin_lock_irqsave(&musb->lock, flags); in musb_urb_enqueue()
2368 spin_unlock_irqrestore(&musb->lock, flags); in musb_urb_enqueue()
2383 struct musb *musb = ep->musb; in musb_cleanup_urb() local
2386 void __iomem *regs = ep->musb->mregs; in musb_cleanup_urb()
2398 status = ep->musb->dma_controller->channel_abort(dma); in musb_cleanup_urb()
2399 dev_dbg(musb->controller, in musb_cleanup_urb()
2434 musb_advance_schedule(ep->musb, urb, ep, is_in); in musb_cleanup_urb()
2440 struct musb *musb = hcd_to_musb(hcd); in musb_urb_dequeue() local
2446 dev_dbg(musb->controller, "urb=%p, dev%d ep%d%s\n", urb, in musb_urb_dequeue()
2451 spin_lock_irqsave(&musb->lock, flags); in musb_urb_dequeue()
2478 musb_giveback(musb, urb, 0); in musb_urb_dequeue()
2492 spin_unlock_irqrestore(&musb->lock, flags); in musb_urb_dequeue()
2502 struct musb *musb = hcd_to_musb(hcd); in musb_h_disable() local
2506 spin_lock_irqsave(&musb->lock, flags); in musb_h_disable()
2532 musb_advance_schedule(musb, urb, qh->hw_ep, is_in); in musb_h_disable()
2540 musb_giveback(musb, next_urb(qh), -ESHUTDOWN); in musb_h_disable()
2547 spin_unlock_irqrestore(&musb->lock, flags); in musb_h_disable()
2552 struct musb *musb = hcd_to_musb(hcd); in musb_h_get_frame_number() local
2554 return musb_readw(musb->mregs, MUSB_FRAME); in musb_h_get_frame_number()
2559 struct musb *musb = hcd_to_musb(hcd); in musb_h_start() local
2565 musb->port1_status = 0; in musb_h_start()
2577 struct musb *musb = hcd_to_musb(hcd); in musb_bus_suspend() local
2580 musb_port_suspend(musb, true); in musb_bus_suspend()
2582 if (!is_host_active(musb)) in musb_bus_suspend()
2585 switch (musb->xceiv->otg->state) { in musb_bus_suspend()
2593 devctl = musb_readb(musb->mregs, MUSB_DEVCTL); in musb_bus_suspend()
2595 musb->xceiv->otg->state = OTG_STATE_A_WAIT_BCON; in musb_bus_suspend()
2601 if (musb->is_active) { in musb_bus_suspend()
2603 usb_otg_state_string(musb->xceiv->otg->state)); in musb_bus_suspend()
2611 struct musb *musb = hcd_to_musb(hcd); in musb_bus_resume() local
2613 if (musb->config && in musb_bus_resume()
2614 musb->config->host_port_deassert_reset_at_resume) in musb_bus_resume()
2615 musb_port_reset(musb, false); in musb_bus_resume()
2699 struct musb *musb = hcd_to_musb(hcd); in musb_map_urb_for_dma() local
2708 if (musb->hwvers < MUSB_HWVERS_1800) in musb_map_urb_for_dma()
2724 struct musb *musb = hcd_to_musb(hcd); in musb_unmap_urb_for_dma() local
2729 if (musb->hwvers < MUSB_HWVERS_1800) in musb_unmap_urb_for_dma()
2739 .hcd_priv_size = sizeof(struct musb *),
2768 int musb_host_alloc(struct musb *musb) in musb_host_alloc() argument
2770 struct device *dev = musb->controller; in musb_host_alloc()
2773 musb->hcd = usb_create_hcd(&musb_hc_driver, dev, dev_name(dev)); in musb_host_alloc()
2774 if (!musb->hcd) in musb_host_alloc()
2777 *musb->hcd->hcd_priv = (unsigned long) musb; in musb_host_alloc()
2778 musb->hcd->self.uses_pio_for_control = 1; in musb_host_alloc()
2779 musb->hcd->uses_new_polling = 1; in musb_host_alloc()
2780 musb->hcd->has_tt = 1; in musb_host_alloc()
2785 void musb_host_cleanup(struct musb *musb) in musb_host_cleanup() argument
2787 if (musb->port_mode == MUSB_PORT_MODE_GADGET) in musb_host_cleanup()
2789 usb_remove_hcd(musb->hcd); in musb_host_cleanup()
2792 void musb_host_free(struct musb *musb) in musb_host_free() argument
2794 usb_put_hcd(musb->hcd); in musb_host_free()
2797 int musb_host_setup(struct musb *musb, int power_budget) in musb_host_setup() argument
2800 struct usb_hcd *hcd = musb->hcd; in musb_host_setup()
2802 MUSB_HST_MODE(musb); in musb_host_setup()
2803 musb->xceiv->otg->default_a = 1; in musb_host_setup()
2804 musb->xceiv->otg->state = OTG_STATE_A_IDLE; in musb_host_setup()
2806 otg_set_host(musb->xceiv->otg, &hcd->self); in musb_host_setup()
2808 musb->xceiv->otg->host = &hcd->self; in musb_host_setup()
2819 void musb_host_resume_root_hub(struct musb *musb) in musb_host_resume_root_hub() argument
2821 usb_hcd_resume_root_hub(musb->hcd); in musb_host_resume_root_hub()
2824 void musb_host_poke_root_hub(struct musb *musb) in musb_host_poke_root_hub() argument
2826 MUSB_HST_MODE(musb); in musb_host_poke_root_hub()
2827 if (musb->hcd->status_urb) in musb_host_poke_root_hub()
2828 usb_hcd_poll_rh_status(musb->hcd); in musb_host_poke_root_hub()
2830 usb_hcd_resume_root_hub(musb->hcd); in musb_host_poke_root_hub()