Lines Matching refs:ep
110 static void musb_h_tx_flush_fifo(struct musb_hw_ep *ep) in musb_h_tx_flush_fifo() argument
112 struct musb *musb = ep->musb; in musb_h_tx_flush_fifo()
113 void __iomem *epio = ep->regs; in musb_h_tx_flush_fifo()
139 ep->epnum, csr)) in musb_h_tx_flush_fifo()
144 static void musb_h_ep0_flush_fifo(struct musb_hw_ep *ep) in musb_h_ep0_flush_fifo() argument
146 void __iomem *epio = ep->regs; in musb_h_ep0_flush_fifo()
161 ep->epnum, csr); in musb_h_ep0_flush_fifo()
171 static inline void musb_h_tx_start(struct musb_hw_ep *ep) in musb_h_tx_start() argument
176 if (ep->epnum) { in musb_h_tx_start()
177 txcsr = musb_readw(ep->regs, MUSB_TXCSR); in musb_h_tx_start()
179 musb_writew(ep->regs, MUSB_TXCSR, txcsr); in musb_h_tx_start()
182 musb_writew(ep->regs, MUSB_CSR0, txcsr); in musb_h_tx_start()
187 static inline void musb_h_tx_dma_start(struct musb_hw_ep *ep) in musb_h_tx_dma_start() argument
192 txcsr = musb_readw(ep->regs, MUSB_TXCSR); in musb_h_tx_dma_start()
194 if (is_cppi_enabled(ep->musb)) in musb_h_tx_dma_start()
196 musb_writew(ep->regs, MUSB_TXCSR, txcsr); in musb_h_tx_dma_start()
199 static void musb_ep_set_qh(struct musb_hw_ep *ep, int is_in, struct musb_qh *qh) in musb_ep_set_qh() argument
201 if (is_in != 0 || ep->is_shared_fifo) in musb_ep_set_qh()
202 ep->in_qh = qh; in musb_ep_set_qh()
203 if (is_in == 0 || ep->is_shared_fifo) in musb_ep_set_qh()
204 ep->out_qh = qh; in musb_ep_set_qh()
207 static struct musb_qh *musb_ep_get_qh(struct musb_hw_ep *ep, int is_in) in musb_ep_get_qh() argument
209 return is_in ? ep->in_qh : ep->out_qh; in musb_ep_get_qh()
363 struct musb_hw_ep *ep = qh->hw_ep; in musb_advance_schedule() local
393 ep->rx_reinit = 1; in musb_advance_schedule()
394 if (ep->rx_channel) { in musb_advance_schedule()
395 dma->channel_release(ep->rx_channel); in musb_advance_schedule()
396 ep->rx_channel = NULL; in musb_advance_schedule()
399 ep->tx_reinit = 1; in musb_advance_schedule()
400 if (ep->tx_channel) { in musb_advance_schedule()
401 dma->channel_release(ep->tx_channel); in musb_advance_schedule()
402 ep->tx_channel = NULL; in musb_advance_schedule()
407 musb_ep_set_qh(ep, is_in, NULL); in musb_advance_schedule()
570 struct musb_hw_ep *ep = musb->endpoints + epnum; in musb_rx_reinit() local
579 if (ep->is_shared_fifo) { in musb_rx_reinit()
580 csr = musb_readw(ep->regs, MUSB_TXCSR); in musb_rx_reinit()
582 musb_h_tx_flush_fifo(ep); in musb_rx_reinit()
583 csr = musb_readw(ep->regs, MUSB_TXCSR); in musb_rx_reinit()
584 musb_writew(ep->regs, MUSB_TXCSR, in musb_rx_reinit()
593 musb_writew(ep->regs, MUSB_TXCSR, MUSB_TXCSR_DMAMODE); in musb_rx_reinit()
594 musb_writew(ep->regs, MUSB_TXCSR, 0); in musb_rx_reinit()
598 csr = musb_readw(ep->regs, MUSB_RXCSR); in musb_rx_reinit()
600 WARNING("rx%d, packet/%d ready?\n", ep->epnum, in musb_rx_reinit()
601 musb_readw(ep->regs, MUSB_RXCOUNT)); in musb_rx_reinit()
603 musb_h_flush_rxfifo(ep, MUSB_RXCSR_CLRDATATOG); in musb_rx_reinit()
615 musb_writeb(ep->regs, MUSB_RXTYPE, qh->type_reg); in musb_rx_reinit()
616 musb_writeb(ep->regs, MUSB_RXINTERVAL, qh->intv_reg); in musb_rx_reinit()
622 musb_writew(ep->regs, MUSB_RXMAXP, ep->max_packet_sz_rx); in musb_rx_reinit()
624 musb_writew(ep->regs, MUSB_RXMAXP, in musb_rx_reinit()
627 ep->rx_reinit = 0; in musb_rx_reinit()
984 static void musb_bulk_nak_timeout(struct musb *musb, struct musb_hw_ep *ep, in musb_bulk_nak_timeout() argument
990 void __iomem *epio = ep->regs; in musb_bulk_nak_timeout()
994 musb_ep_select(mbase, ep->epnum); in musb_bulk_nak_timeout()
996 dma = is_dma_capable() ? ep->rx_channel : NULL; in musb_bulk_nak_timeout()
1006 dma = is_dma_capable() ? ep->tx_channel : NULL; in musb_bulk_nak_timeout()
1034 ep->rx_reinit = 1; in musb_bulk_nak_timeout()
1043 ep->tx_reinit = 1; in musb_bulk_nak_timeout()
2198 struct usb_host_endpoint *hep = urb->ep; in musb_urb_enqueue()
2382 struct musb_hw_ep *ep = qh->hw_ep; in musb_cleanup_urb() local
2383 struct musb *musb = ep->musb; in musb_cleanup_urb()
2384 void __iomem *epio = ep->regs; in musb_cleanup_urb()
2385 unsigned hw_end = ep->epnum; in musb_cleanup_urb()
2386 void __iomem *regs = ep->musb->mregs; in musb_cleanup_urb()
2396 dma = is_in ? ep->rx_channel : ep->tx_channel; in musb_cleanup_urb()
2398 status = ep->musb->dma_controller->channel_abort(dma); in musb_cleanup_urb()
2401 is_in ? 'R' : 'T', ep->epnum, in musb_cleanup_urb()
2408 if (ep->epnum && is_in) { in musb_cleanup_urb()
2410 csr = musb_h_flush_rxfifo(ep, 0); in musb_cleanup_urb()
2416 } else if (ep->epnum) { in musb_cleanup_urb()
2417 musb_h_tx_flush_fifo(ep); in musb_cleanup_urb()
2431 musb_h_ep0_flush_fifo(ep); in musb_cleanup_urb()
2434 musb_advance_schedule(ep->musb, urb, ep, is_in); in musb_cleanup_urb()