Lines Matching refs:musb
46 #define next_ep0_request(musb) next_in_request(&(musb)->endpoints[0]) argument
76 struct musb *musb, in service_tx_status_request() argument
79 void __iomem *mbase = musb->mregs; in service_tx_status_request()
88 result[0] = musb->g.is_selfpowered << USB_DEVICE_SELF_POWERED; in service_tx_status_request()
89 result[0] |= musb->may_wakeup << USB_DEVICE_REMOTE_WAKEUP; in service_tx_status_request()
90 if (musb->g.is_otg) { in service_tx_status_request()
91 result[0] |= musb->g.b_hnp_enable in service_tx_status_request()
93 result[0] |= musb->g.a_alt_hnp_support in service_tx_status_request()
95 result[0] |= musb->g.a_hnp_support in service_tx_status_request()
119 ep = &musb->endpoints[epnum].ep_in; in service_tx_status_request()
121 ep = &musb->endpoints[epnum].ep_out; in service_tx_status_request()
123 regs = musb->endpoints[epnum].regs; in service_tx_status_request()
154 musb_write_fifo(&musb->endpoints[0], len, result); in service_tx_status_request()
172 service_in_request(struct musb *musb, const struct usb_ctrlrequest *ctrlrequest) in service_in_request() argument
180 handled = service_tx_status_request(musb, in service_in_request()
196 static void musb_g_ep0_giveback(struct musb *musb, struct usb_request *req) in musb_g_ep0_giveback() argument
198 musb_g_giveback(&musb->endpoints[0].ep_in, req, 0); in musb_g_ep0_giveback()
204 static inline void musb_try_b_hnp_enable(struct musb *musb) in musb_try_b_hnp_enable() argument
206 void __iomem *mbase = musb->mregs; in musb_try_b_hnp_enable()
209 dev_dbg(musb->controller, "HNP: Setting HR\n"); in musb_try_b_hnp_enable()
225 service_zero_data_request(struct musb *musb, in service_zero_data_request() argument
227 __releases(musb->lock) in service_zero_data_request()
228 __acquires(musb->lock) in service_zero_data_request()
231 void __iomem *mbase = musb->mregs; in service_zero_data_request()
240 musb->set_address = true; in service_zero_data_request()
241 musb->address = (u8) (ctrlrequest->wValue & 0x7f); in service_zero_data_request()
251 musb->may_wakeup = 0; in service_zero_data_request()
270 ep = musb->endpoints + epnum; in service_zero_data_request()
306 dev_dbg(musb->controller, "restarting the request\n"); in service_zero_data_request()
307 musb_ep_restart(musb, request); in service_zero_data_request()
326 musb->may_wakeup = 1; in service_zero_data_request()
329 if (musb->g.speed != USB_SPEED_HIGH) in service_zero_data_request()
338 musb->test_mode_nr = in service_zero_data_request()
344 musb->test_mode_nr = in service_zero_data_request()
350 musb->test_mode_nr = in service_zero_data_request()
356 musb->test_mode_nr = in service_zero_data_request()
363 musb->test_mode_nr = in service_zero_data_request()
369 musb->test_mode_nr = in service_zero_data_request()
375 musb->test_mode_nr = in service_zero_data_request()
381 musb->test_mode_nr = in service_zero_data_request()
390 musb->test_mode = true; in service_zero_data_request()
393 if (!musb->g.is_otg) in service_zero_data_request()
395 musb->g.b_hnp_enable = 1; in service_zero_data_request()
396 musb_try_b_hnp_enable(musb); in service_zero_data_request()
399 if (!musb->g.is_otg) in service_zero_data_request()
401 musb->g.a_hnp_support = 1; in service_zero_data_request()
404 if (!musb->g.is_otg) in service_zero_data_request()
406 musb->g.a_alt_hnp_support = 1; in service_zero_data_request()
434 ep = musb->endpoints + epnum; in service_zero_data_request()
485 static void ep0_rxstate(struct musb *musb) in ep0_rxstate() argument
487 void __iomem *regs = musb->control_ep->regs; in ep0_rxstate()
492 request = next_ep0_request(musb); in ep0_rxstate()
509 musb_read_fifo(&musb->endpoints[0], count, buf); in ep0_rxstate()
514 musb->ep0_state = MUSB_EP0_STAGE_STATUSIN; in ep0_rxstate()
526 musb->ackpend = csr; in ep0_rxstate()
527 musb_g_ep0_giveback(musb, req); in ep0_rxstate()
528 if (!musb->ackpend) in ep0_rxstate()
530 musb->ackpend = 0; in ep0_rxstate()
532 musb_ep_select(musb->mregs, 0); in ep0_rxstate()
542 static void ep0_txstate(struct musb *musb) in ep0_txstate() argument
544 void __iomem *regs = musb->control_ep->regs; in ep0_txstate()
545 struct musb_request *req = next_ep0_request(musb); in ep0_txstate()
553 dev_dbg(musb->controller, "odd; csr0 %04x\n", musb_readw(regs, MUSB_CSR0)); in ep0_txstate()
563 musb_write_fifo(&musb->endpoints[0], fifo_count, fifo_src); in ep0_txstate()
570 musb->ep0_state = MUSB_EP0_STAGE_STATUSOUT; in ep0_txstate()
581 musb->ackpend = csr; in ep0_txstate()
582 musb_g_ep0_giveback(musb, request); in ep0_txstate()
583 if (!musb->ackpend) in ep0_txstate()
585 musb->ackpend = 0; in ep0_txstate()
589 musb_ep_select(musb->mregs, 0); in ep0_txstate()
600 musb_read_setup(struct musb *musb, struct usb_ctrlrequest *req) in musb_read_setup() argument
603 void __iomem *regs = musb->control_ep->regs; in musb_read_setup()
605 musb_read_fifo(&musb->endpoints[0], sizeof *req, (u8 *)req); in musb_read_setup()
610 dev_dbg(musb->controller, "SETUP req%02x.%02x v%04x i%04x l%d\n", in musb_read_setup()
618 r = next_ep0_request(musb); in musb_read_setup()
620 musb_g_ep0_giveback(musb, &r->request); in musb_read_setup()
630 musb->set_address = false; in musb_read_setup()
631 musb->ackpend = MUSB_CSR0_P_SVDRXPKTRDY; in musb_read_setup()
634 musb->ackpend |= MUSB_CSR0_TXPKTRDY; in musb_read_setup()
635 musb->ep0_state = MUSB_EP0_STAGE_ACKWAIT; in musb_read_setup()
637 musb->ep0_state = MUSB_EP0_STAGE_TX; in musb_read_setup()
642 musb->ackpend = 0; in musb_read_setup()
644 musb->ep0_state = MUSB_EP0_STAGE_RX; in musb_read_setup()
648 forward_to_driver(struct musb *musb, const struct usb_ctrlrequest *ctrlrequest) in forward_to_driver() argument
649 __releases(musb->lock) in forward_to_driver()
650 __acquires(musb->lock) in forward_to_driver()
653 if (!musb->gadget_driver) in forward_to_driver()
655 spin_unlock(&musb->lock); in forward_to_driver()
656 retval = musb->gadget_driver->setup(&musb->g, ctrlrequest); in forward_to_driver()
657 spin_lock(&musb->lock); in forward_to_driver()
666 irqreturn_t musb_g_ep0_irq(struct musb *musb) in musb_g_ep0_irq() argument
670 void __iomem *mbase = musb->mregs; in musb_g_ep0_irq()
671 void __iomem *regs = musb->endpoints[0].regs; in musb_g_ep0_irq()
678 dev_dbg(musb->controller, "csr %04x, count %d, ep0stage %s\n", in musb_g_ep0_irq()
679 csr, len, decode_ep0stage(musb->ep0_state)); in musb_g_ep0_irq()
694 musb->ep0_state = MUSB_EP0_STAGE_IDLE; in musb_g_ep0_irq()
703 switch (musb->ep0_state) { in musb_g_ep0_irq()
705 musb->ep0_state = MUSB_EP0_STAGE_STATUSOUT; in musb_g_ep0_irq()
708 musb->ep0_state = MUSB_EP0_STAGE_STATUSIN; in musb_g_ep0_irq()
712 decode_ep0stage(musb->ep0_state)); in musb_g_ep0_irq()
722 switch (musb->ep0_state) { in musb_g_ep0_irq()
727 ep0_txstate(musb); in musb_g_ep0_irq()
735 ep0_rxstate(musb); in musb_g_ep0_irq()
748 if (musb->set_address) { in musb_g_ep0_irq()
749 musb->set_address = false; in musb_g_ep0_irq()
750 musb_writeb(mbase, MUSB_FADDR, musb->address); in musb_g_ep0_irq()
754 else if (musb->test_mode) { in musb_g_ep0_irq()
755 dev_dbg(musb->controller, "entering TESTMODE\n"); in musb_g_ep0_irq()
757 if (MUSB_TEST_PACKET == musb->test_mode_nr) in musb_g_ep0_irq()
758 musb_load_testpacket(musb); in musb_g_ep0_irq()
761 musb->test_mode_nr); in musb_g_ep0_irq()
770 req = next_ep0_request(musb); in musb_g_ep0_irq()
772 musb_g_ep0_giveback(musb, &req->request); in musb_g_ep0_irq()
783 musb->ep0_state = MUSB_EP0_STAGE_IDLE; in musb_g_ep0_irq()
794 musb->ep0_state = MUSB_EP0_STAGE_SETUP; in musb_g_ep0_irq()
807 musb_read_setup(musb, &setup); in musb_g_ep0_irq()
811 if (unlikely(musb->g.speed == USB_SPEED_UNKNOWN)) { in musb_g_ep0_irq()
818 musb->g.speed = (power & MUSB_POWER_HSMODE) in musb_g_ep0_irq()
823 switch (musb->ep0_state) { in musb_g_ep0_irq()
832 musb, &setup); in musb_g_ep0_irq()
840 musb->ackpend |= MUSB_CSR0_P_DATAEND; in musb_g_ep0_irq()
844 musb->ep0_state = in musb_g_ep0_irq()
853 handled = service_in_request(musb, &setup); in musb_g_ep0_irq()
855 musb->ackpend = MUSB_CSR0_TXPKTRDY in musb_g_ep0_irq()
857 musb->ep0_state = in musb_g_ep0_irq()
867 dev_dbg(musb->controller, "handled %d, csr %04x, ep0stage %s\n", in musb_g_ep0_irq()
869 decode_ep0stage(musb->ep0_state)); in musb_g_ep0_irq()
880 handled = forward_to_driver(musb, &setup); in musb_g_ep0_irq()
884 dev_dbg(musb->controller, "stall (%d)\n", handled); in musb_g_ep0_irq()
885 musb->ackpend |= MUSB_CSR0_P_SENDSTALL; in musb_g_ep0_irq()
886 musb->ep0_state = MUSB_EP0_STAGE_IDLE; in musb_g_ep0_irq()
889 musb->ackpend); in musb_g_ep0_irq()
890 musb->ackpend = 0; in musb_g_ep0_irq()
906 musb->ep0_state = MUSB_EP0_STAGE_IDLE; in musb_g_ep0_irq()
932 struct musb *musb; in musb_g_ep0_queue() local
941 musb = ep->musb; in musb_g_ep0_queue()
942 regs = musb->control_ep->regs; in musb_g_ep0_queue()
945 req->musb = musb; in musb_g_ep0_queue()
950 spin_lock_irqsave(&musb->lock, lockflags); in musb_g_ep0_queue()
957 switch (musb->ep0_state) { in musb_g_ep0_queue()
964 dev_dbg(musb->controller, "ep0 request queued in state %d\n", in musb_g_ep0_queue()
965 musb->ep0_state); in musb_g_ep0_queue()
973 dev_dbg(musb->controller, "queue to %s (%s), length=%d\n", in musb_g_ep0_queue()
977 musb_ep_select(musb->mregs, 0); in musb_g_ep0_queue()
980 if (musb->ep0_state == MUSB_EP0_STAGE_TX) in musb_g_ep0_queue()
981 ep0_txstate(musb); in musb_g_ep0_queue()
984 else if (musb->ep0_state == MUSB_EP0_STAGE_ACKWAIT) { in musb_g_ep0_queue()
988 musb->ep0_state = MUSB_EP0_STAGE_STATUSIN; in musb_g_ep0_queue()
990 musb->ackpend | MUSB_CSR0_P_DATAEND); in musb_g_ep0_queue()
991 musb->ackpend = 0; in musb_g_ep0_queue()
992 musb_g_ep0_giveback(ep->musb, r); in musb_g_ep0_queue()
999 } else if (musb->ackpend) { in musb_g_ep0_queue()
1000 musb_writew(regs, MUSB_CSR0, musb->ackpend); in musb_g_ep0_queue()
1001 musb->ackpend = 0; in musb_g_ep0_queue()
1005 spin_unlock_irqrestore(&musb->lock, lockflags); in musb_g_ep0_queue()
1018 struct musb *musb; in musb_g_ep0_halt() local
1028 musb = ep->musb; in musb_g_ep0_halt()
1029 base = musb->mregs; in musb_g_ep0_halt()
1030 regs = musb->control_ep->regs; in musb_g_ep0_halt()
1033 spin_lock_irqsave(&musb->lock, flags); in musb_g_ep0_halt()
1041 csr = musb->ackpend; in musb_g_ep0_halt()
1043 switch (musb->ep0_state) { in musb_g_ep0_halt()
1062 musb->ep0_state = MUSB_EP0_STAGE_IDLE; in musb_g_ep0_halt()
1063 musb->ackpend = 0; in musb_g_ep0_halt()
1066 dev_dbg(musb->controller, "ep0 can't halt in state %d\n", musb->ep0_state); in musb_g_ep0_halt()
1071 spin_unlock_irqrestore(&musb->lock, flags); in musb_g_ep0_halt()