262 	u16			fifo_count = 0, csr;  in txstate()  local
281 	csr = musb_readw(epio, MUSB_TXCSR);  in txstate()
287 	if (csr & MUSB_TXCSR_TXPKTRDY) {  in txstate()
289 				musb_ep->end_point.name, csr);  in txstate()
293 	if (csr & MUSB_TXCSR_P_SENDSTALL) {  in txstate()
295 				musb_ep->end_point.name, csr);  in txstate()
301 			csr);  in txstate()
334 					csr &= ~(MUSB_TXCSR_AUTOSET  in txstate()
336 					musb_writew(epio, MUSB_TXCSR, csr  in txstate()
338 					csr &= ~MUSB_TXCSR_DMAMODE;  in txstate()
339 					csr |= (MUSB_TXCSR_DMAENAB |  in txstate()
343 					csr |= (MUSB_TXCSR_DMAENAB  in txstate()
359 						csr |= MUSB_TXCSR_AUTOSET;  in txstate()
361 				csr &= ~MUSB_TXCSR_P_UNDERRUN;  in txstate()
363 				musb_writew(epio, MUSB_TXCSR, csr);  in txstate()
369 			csr &= ~(MUSB_TXCSR_P_UNDERRUN | MUSB_TXCSR_TXPKTRDY);  in txstate()
370 			csr |= MUSB_TXCSR_DMAENAB | MUSB_TXCSR_DMAMODE |  in txstate()
373 						~MUSB_TXCSR_P_UNDERRUN) | csr);  in txstate()
376 			csr = musb_readw(epio, MUSB_TXCSR);  in txstate()
399 				csr &= ~MUSB_TXCSR_DMAENAB;  in txstate()
400 				musb_writew(epio, MUSB_TXCSR, csr);  in txstate()
422 		csr |= MUSB_TXCSR_TXPKTRDY;  in txstate()
423 		csr &= ~MUSB_TXCSR_P_UNDERRUN;  in txstate()
424 		musb_writew(epio, MUSB_TXCSR, csr);  in txstate()
442 	u16			csr;  in musb_g_tx()  local
454 	csr = musb_readw(epio, MUSB_TXCSR);  in musb_g_tx()
455 	dev_dbg(musb->controller, "<== %s, txcsr %04x\n", musb_ep->end_point.name, csr);  in musb_g_tx()
463 	if (csr & MUSB_TXCSR_P_SENTSTALL) {  in musb_g_tx()
464 		csr |=	MUSB_TXCSR_P_WZC_BITS;  in musb_g_tx()
465 		csr &= ~MUSB_TXCSR_P_SENTSTALL;  in musb_g_tx()
466 		musb_writew(epio, MUSB_TXCSR, csr);  in musb_g_tx()
470 	if (csr & MUSB_TXCSR_P_UNDERRUN) {  in musb_g_tx()
472 		csr |=	 MUSB_TXCSR_P_WZC_BITS;  in musb_g_tx()
473 		csr &= ~(MUSB_TXCSR_P_UNDERRUN | MUSB_TXCSR_TXPKTRDY);  in musb_g_tx()
474 		musb_writew(epio, MUSB_TXCSR, csr);  in musb_g_tx()
492 		if (dma && (csr & MUSB_TXCSR_DMAENAB)) {  in musb_g_tx()
494 			csr |= MUSB_TXCSR_P_WZC_BITS;  in musb_g_tx()
495 			csr &= ~(MUSB_TXCSR_DMAENAB | MUSB_TXCSR_P_UNDERRUN |  in musb_g_tx()
497 			musb_writew(epio, MUSB_TXCSR, csr);  in musb_g_tx()
499 			csr = musb_readw(epio, MUSB_TXCSR);  in musb_g_tx()
502 				epnum, csr, musb_ep->dma->actual_len, request);  in musb_g_tx()
525 			if (csr & MUSB_TXCSR_TXPKTRDY)  in musb_g_tx()
570 	u16			csr = musb_readw(epio, MUSB_RXCSR);  in rxstate()  local
594 	if (csr & MUSB_RXCSR_P_SENDSTALL) {  in rxstate()
596 		    musb_ep->end_point.name, csr);  in rxstate()
619 			csr &= ~(MUSB_RXCSR_AUTOCLEAR  in rxstate()
621 			csr |= MUSB_RXCSR_DMAENAB | MUSB_RXCSR_P_WZC_BITS;  in rxstate()
622 			musb_writew(epio, MUSB_RXCSR, csr);  in rxstate()
627 	if (csr & MUSB_RXCSR_RXPKTRDY) {  in rxstate()
677 					csr |= MUSB_RXCSR_AUTOCLEAR;  in rxstate()
678 					musb_writew(epio, MUSB_RXCSR, csr);  in rxstate()
679 					csr |= MUSB_RXCSR_DMAENAB;  in rxstate()
680 					musb_writew(epio, MUSB_RXCSR, csr);  in rxstate()
688 						csr | MUSB_RXCSR_DMAMODE);  in rxstate()
689 					musb_writew(epio, MUSB_RXCSR, csr);  in rxstate()
699 						csr |= MUSB_RXCSR_AUTOCLEAR;  in rxstate()
700 					csr |= MUSB_RXCSR_DMAENAB;  in rxstate()
701 					musb_writew(epio, MUSB_RXCSR, csr);  in rxstate()
744 				csr &= ~MUSB_RXCSR_DMAMODE;  in rxstate()
745 				csr |= (MUSB_RXCSR_DMAENAB |  in rxstate()
748 				musb_writew(epio, MUSB_RXCSR, csr);  in rxstate()
755 					csr |= MUSB_RXCSR_DMAMODE;  in rxstate()
756 					musb_writew(epio, MUSB_RXCSR, csr);  in rxstate()
803 			csr &= ~(MUSB_RXCSR_DMAENAB | MUSB_RXCSR_AUTOCLEAR);  in rxstate()
804 			musb_writew(epio, MUSB_RXCSR, csr);  in rxstate()
816 			csr |= MUSB_RXCSR_P_WZC_BITS;  in rxstate()
817 			csr &= ~MUSB_RXCSR_RXPKTRDY;  in rxstate()
818 			musb_writew(epio, MUSB_RXCSR, csr);  in rxstate()
833 	u16			csr;  in musb_g_rx()  local
855 	csr = musb_readw(epio, MUSB_RXCSR);  in musb_g_rx()
859 			csr, dma ? " (dma)" : "", request);  in musb_g_rx()
861 	if (csr & MUSB_RXCSR_P_SENTSTALL) {  in musb_g_rx()
862 		csr |= MUSB_RXCSR_P_WZC_BITS;  in musb_g_rx()
863 		csr &= ~MUSB_RXCSR_P_SENTSTALL;  in musb_g_rx()
864 		musb_writew(epio, MUSB_RXCSR, csr);  in musb_g_rx()
868 	if (csr & MUSB_RXCSR_P_OVERRUN) {  in musb_g_rx()
870 		csr &= ~MUSB_RXCSR_P_OVERRUN;  in musb_g_rx()
871 		musb_writew(epio, MUSB_RXCSR, csr);  in musb_g_rx()
877 	if (csr & MUSB_RXCSR_INCOMPRX) {  in musb_g_rx()
885 			musb_ep->end_point.name, csr);  in musb_g_rx()
889 	if (dma && (csr & MUSB_RXCSR_DMAENAB)) {  in musb_g_rx()
890 		csr &= ~(MUSB_RXCSR_AUTOCLEAR  in musb_g_rx()
894 			MUSB_RXCSR_P_WZC_BITS | csr);  in musb_g_rx()
899 			epnum, csr,  in musb_g_rx()
910 			csr &= ~MUSB_RXCSR_RXPKTRDY;  in musb_g_rx()
911 			musb_writew(epio, MUSB_RXCSR, csr);  in musb_g_rx()
921 			csr = musb_readw(epio, MUSB_RXCSR);  in musb_g_rx()
922 			if ((csr & MUSB_RXCSR_RXPKTRDY) &&  in musb_g_rx()
963 	u16		csr;  in musb_gadget_enable()  local
1046 		csr = MUSB_TXCSR_MODE | MUSB_TXCSR_CLRDATATOG;  in musb_gadget_enable()
1049 			csr |= MUSB_TXCSR_FLUSHFIFO;  in musb_gadget_enable()
1051 			csr |= MUSB_TXCSR_P_ISO;  in musb_gadget_enable()
1054 		musb_writew(regs, MUSB_TXCSR, csr);  in musb_gadget_enable()
1056 		musb_writew(regs, MUSB_TXCSR, csr);  in musb_gadget_enable()
1087 			csr = musb_readw(regs, MUSB_TXCSR);  in musb_gadget_enable()
1088 			csr &= ~(MUSB_TXCSR_MODE | MUSB_TXCSR_TXPKTRDY);  in musb_gadget_enable()
1089 			musb_writew(regs, MUSB_TXCSR, csr);  in musb_gadget_enable()
1092 		csr = MUSB_RXCSR_FLUSHFIFO | MUSB_RXCSR_CLRDATATOG;  in musb_gadget_enable()
1094 			csr |= MUSB_RXCSR_P_ISO;  in musb_gadget_enable()
1096 			csr |= MUSB_RXCSR_DISNYET;  in musb_gadget_enable()
1099 		musb_writew(regs, MUSB_RXCSR, csr);  in musb_gadget_enable()
1100 		musb_writew(regs, MUSB_RXCSR, csr);  in musb_gadget_enable()
1361 	u16			csr;  in musb_gadget_set_halt()  local
1388 			csr = musb_readw(epio, MUSB_TXCSR);  in musb_gadget_set_halt()
1389 			if (csr & MUSB_TXCSR_FIFONOTEMPTY) {  in musb_gadget_set_halt()
1401 		csr = musb_readw(epio, MUSB_TXCSR);  in musb_gadget_set_halt()
1402 		csr |= MUSB_TXCSR_P_WZC_BITS  in musb_gadget_set_halt()
1405 			csr |= MUSB_TXCSR_P_SENDSTALL;  in musb_gadget_set_halt()
1407 			csr &= ~(MUSB_TXCSR_P_SENDSTALL  in musb_gadget_set_halt()
1409 		csr &= ~MUSB_TXCSR_TXPKTRDY;  in musb_gadget_set_halt()
1410 		musb_writew(epio, MUSB_TXCSR, csr);  in musb_gadget_set_halt()
1412 		csr = musb_readw(epio, MUSB_RXCSR);  in musb_gadget_set_halt()
1413 		csr |= MUSB_RXCSR_P_WZC_BITS  in musb_gadget_set_halt()
1417 			csr |= MUSB_RXCSR_P_SENDSTALL;  in musb_gadget_set_halt()
1419 			csr &= ~(MUSB_RXCSR_P_SENDSTALL  in musb_gadget_set_halt()
1421 		musb_writew(epio, MUSB_RXCSR, csr);  in musb_gadget_set_halt()
1481 	u16		csr;  in musb_gadget_fifo_flush()  local
1492 		csr = musb_readw(epio, MUSB_TXCSR);  in musb_gadget_fifo_flush()
1493 		if (csr & MUSB_TXCSR_FIFONOTEMPTY) {  in musb_gadget_fifo_flush()
1494 			csr |= MUSB_TXCSR_FLUSHFIFO | MUSB_TXCSR_P_WZC_BITS;  in musb_gadget_fifo_flush()
1500 			csr &= ~MUSB_TXCSR_TXPKTRDY;  in musb_gadget_fifo_flush()
1501 			musb_writew(epio, MUSB_TXCSR, csr);  in musb_gadget_fifo_flush()
1503 			musb_writew(epio, MUSB_TXCSR, csr);  in musb_gadget_fifo_flush()
1506 		csr = musb_readw(epio, MUSB_RXCSR);  in musb_gadget_fifo_flush()
1507 		csr |= MUSB_RXCSR_FLUSHFIFO | MUSB_RXCSR_P_WZC_BITS;  in musb_gadget_fifo_flush()
1508 		musb_writew(epio, MUSB_RXCSR, csr);  in musb_gadget_fifo_flush()
1509 		musb_writew(epio, MUSB_RXCSR, csr);  in musb_gadget_fifo_flush()