327 	u32		ep_csr;  in s3c2410_udc_write_fifo()  local
379 			ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);  in s3c2410_udc_write_fifo()
381 			udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY,  in s3c2410_udc_write_fifo()
395 			ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);  in s3c2410_udc_write_fifo()
397 			udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY,  in s3c2410_udc_write_fifo()
424 	u32		ep_csr;  in s3c2410_udc_read_fifo()  local
502 			ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG);  in s3c2410_udc_read_fifo()
504 			udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY,  in s3c2410_udc_read_fifo()
514 			ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG);  in s3c2410_udc_read_fifo()
516 			udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY,  in s3c2410_udc_read_fifo()
1189 	u32			ep_csr = 0;  in s3c2410_udc_queue()  local
1229 		ep_csr = udc_read((ep->bEndpointAddress & USB_DIR_IN)  in s3c2410_udc_queue()
1235 		ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);  in s3c2410_udc_queue()
1244 				if (!(ep_csr&S3C2410_UDC_EP0_CSR_IPKRDY)  in s3c2410_udc_queue()
1254 					|| ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY)  in s3c2410_udc_queue()
1267 				&& (!(ep_csr&S3C2410_UDC_OCSR1_PKTRDY))  in s3c2410_udc_queue()
1270 		} else if ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY)  in s3c2410_udc_queue()
1337 	u32			ep_csr = 0;  in s3c2410_udc_set_halt()  local
1355 		ep_csr = udc_read((ep->bEndpointAddress & USB_DIR_IN)  in s3c2410_udc_set_halt()
1361 				udc_write(ep_csr | S3C2410_UDC_ICSR1_SENDSTL,  in s3c2410_udc_set_halt()
1364 				ep_csr &= ~S3C2410_UDC_ICSR1_SENDSTL;  in s3c2410_udc_set_halt()
1365 				udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG);  in s3c2410_udc_set_halt()
1366 				ep_csr |= S3C2410_UDC_ICSR1_CLRDT;  in s3c2410_udc_set_halt()
1367 				udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG);  in s3c2410_udc_set_halt()
1371 				udc_write(ep_csr | S3C2410_UDC_OCSR1_SENDSTL,  in s3c2410_udc_set_halt()
1374 				ep_csr &= ~S3C2410_UDC_OCSR1_SENDSTL;  in s3c2410_udc_set_halt()
1375 				udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG);  in s3c2410_udc_set_halt()
1376 				ep_csr |= S3C2410_UDC_OCSR1_CLRDT;  in s3c2410_udc_set_halt()
1377 				udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG);  in s3c2410_udc_set_halt()