184 	writel(ep_addr, hsudc->regs + S3C_IR);  in set_index()
189 	writel(readl(ptr) | val, ptr);  in __orr32()
197 	writel(cfg, S3C2443_PWRCFG);  in s3c_hsudc_init_phy()
201 	writel(cfg, S3C2443_URSTCON);  in s3c_hsudc_init_phy()
206 	writel(cfg, S3C2443_URSTCON);  in s3c_hsudc_init_phy()
211 	writel(cfg, S3C2443_PHYCTRL);  in s3c_hsudc_init_phy()
218 	writel(cfg, S3C2443_PHYPWR);  in s3c_hsudc_init_phy()
223 	writel(cfg, S3C2443_UCLKCON);  in s3c_hsudc_init_phy()
231 	writel(cfg, S3C2443_PWRCFG);  in s3c_hsudc_uninit_phy()
233 	writel(S3C2443_PHYPWR_FSUSPEND, S3C2443_PHYPWR);  in s3c_hsudc_uninit_phy()
236 	writel(cfg, S3C2443_UCLKCON);  in s3c_hsudc_uninit_phy()
320 	writel(S3C_EP0SR_RX_SUCCESS, hsudc->regs + S3C_EP0SR);  in s3c_hsudc_read_setup_pkt()
347 	writel(length, hsep->dev->regs + S3C_BWCR);  in s3c_hsudc_write_fifo()
349 		writel(*buf++, fifo);  in s3c_hsudc_write_fifo()
412 	writel(S3C_ESR_RX_SUCCESS, hsudc->regs + offset);  in s3c_hsudc_read_fifo()
438 		writel(S3C_ESR_STALL, hsudc->regs + S3C_ESR);  in s3c_hsudc_epin_intr()
443 		writel(S3C_ESR_TX_SUCCESS, hsudc->regs + S3C_ESR);  in s3c_hsudc_epin_intr()
471 		writel(S3C_ESR_STALL, hsudc->regs + S3C_ESR);  in s3c_hsudc_epout_intr()
526 	writel(ecr, hsudc->regs + offset);  in s3c_hsudc_set_halt()
704 		writel(ecr, hsudc->regs + S3C_EP0CR);  in s3c_hsudc_handle_ep0_intr()
706 		writel(S3C_EP0SR_STALL, hsudc->regs + S3C_EP0SR);  in s3c_hsudc_handle_ep0_intr()
716 		writel(S3C_EP0SR_TX_SUCCESS, hsudc->regs + S3C_EP0SR);  in s3c_hsudc_handle_ep0_intr()
779 	writel(ecr, hsudc->regs + S3C_ECR);  in s3c_hsudc_ep_enable()
1024 	writel(hsep->ep.maxpacket, hsudc->regs + S3C_MPR);  in s3c_hsudc_initep()
1051 	writel(0xAA, hsudc->regs + S3C_EDR);  in s3c_hsudc_reconfig()
1052 	writel(1, hsudc->regs + S3C_EIER);  in s3c_hsudc_reconfig()
1053 	writel(0, hsudc->regs + S3C_TR);  in s3c_hsudc_reconfig()
1054 	writel(S3C_SCR_DTZIEN_EN | S3C_SCR_RRD_EN | S3C_SCR_SUS_EN |  in s3c_hsudc_reconfig()
1056 	writel(0, hsudc->regs + S3C_EP0CR);  in s3c_hsudc_reconfig()
1089 			writel(S3C_SSR_VBUSON, hsudc->regs + S3C_SSR);  in s3c_hsudc_irq()
1092 			writel(S3C_SSR_ERR, hsudc->regs + S3C_SSR);  in s3c_hsudc_irq()
1095 			writel(S3C_SSR_SDE, hsudc->regs + S3C_SSR);  in s3c_hsudc_irq()
1101 			writel(S3C_SSR_SUSPEND, hsudc->regs + S3C_SSR);  in s3c_hsudc_irq()
1108 			writel(S3C_SSR_RESUME, hsudc->regs + S3C_SSR);  in s3c_hsudc_irq()
1115 			writel(S3C_SSR_RESET, hsudc->regs + S3C_SSR);  in s3c_hsudc_irq()
1127 		writel(S3C_EIR_EP0, hsudc->regs + S3C_EIR);  in s3c_hsudc_irq()
1138 			writel(1 << ep_idx, hsudc->regs + S3C_EIR);  in s3c_hsudc_irq()