122 	if ((readl(ep->reg_status) & EPxSTATUS_EP_MASK)  in goku_ep_enable()
166 		tmp |= readl(&regs->EPxSingle);  in goku_ep_enable()
170 		tmp |= readl(&regs->EPxBCS);  in goku_ep_enable()
204 		readl(&regs->int_enable);  in ep_reset()
209 			tmp = readl(&r->EPxSingle);  in ep_reset()
213 			tmp = readl(&r->EPxBCS);  in ep_reset()
221 			master = readl(&regs->dma_master) & MST_RW_BITS;  in ep_reset()
353 	tmp = readl(&dev->regs->DataSet);  in write_fifo()
425 		set = readl(&regs->DataSet) & DATASET_AB(ep->num);  in read_fifo()
426 		size = readl(&regs->EPxSizeLA[ep->num]);  in read_fifo()
435 				size = readl(&regs->EPxSizeLB[ep->num]);  in read_fifo()
453 			u8	byte = (u8) readl(ep->reg_fifo);  in read_fifo()
538 	master = readl(&regs->dma_master) & MST_RW_BITS;  in start_dma()
592 	master = readl(&regs->dma_master);  in dma_advance()
609 		req->req.actual = readl(&regs->in_dma_current);  in dma_advance()
617 		req->req.actual = readl(&regs->out_dma_current);  in dma_advance()
649 	master = readl(&regs->dma_master) & MST_RW_BITS;  in abort_dma()
657 		if (unlikely((readl(&regs->dma_master) & MST_RD_ENA) == 0))  in abort_dma()
659 		curr = readl(&regs->in_dma_current);  in abort_dma()
668 		if (readl(&regs->dma_master) & MST_RD_ENA)  in abort_dma()
672 		if (unlikely((readl(&regs->dma_master) & MST_WR_ENA) == 0))  in abort_dma()
674 		curr = readl(&regs->out_dma_current);  in abort_dma()
683 		if (readl(&regs->dma_master) & MST_WR_ENA)  in abort_dma()
905 			&& (readl(&ep->dev->regs->DataSet)  in goku_set_halt()
914 		readl(ep->reg_status);  in goku_set_halt()
936 	size = readl(&regs->EPxSizeLA[ep->num]) & DATASIZE;  in goku_fifo_status()
937 	size += readl(&regs->EPxSizeLB[ep->num]) & DATASIZE;  in goku_fifo_status()
960 	size = readl(&regs->EPxSizeLA[ep->num]);  in goku_fifo_flush()
1142 	tmp = readl(&regs->power_detect);  in udc_proc_read()
1158 	dump_intmask(m, "int_status", readl(&regs->int_status));  in udc_proc_read()
1159 	dump_intmask(m, "int_enable", readl(&regs->int_enable));  in udc_proc_read()
1166 		   dev->irqs, readl(&regs->DataSet),  in udc_proc_read()
1167 		   readl(&regs->EPxSingle), readl(&regs->EPxBCS),  in udc_proc_read()
1168 		   readl(&regs->UsbState),  in udc_proc_read()
1169 		   readl(&regs->address));  in udc_proc_read()
1173 	tmp = readl(&regs->dma_master);  in udc_proc_read()
1199 		tmp = readl(ep->reg_status);  in udc_proc_read()
1223 					tmp = readl(&regs->in_dma_current);  in udc_proc_read()
1225 					tmp = readl(&regs->out_dma_current);  in udc_proc_read()
1311 	readl(&regs->int_enable);  in udc_reset()
1319 	readl(&regs->int_enable);  in udc_reset()
1352 	readl(&regs->int_enable);  in ep0_start()
1360 	if (readl(&dev->regs->power_detect) & PW_DETECT)  in udc_enable()
1437 	ctrl.bRequestType = readl(&regs->bRequestType);  in ep0_setup()
1438 	ctrl.bRequest = readl(&regs->bRequest);  in ep0_setup()
1439 	ctrl.wValue  = cpu_to_le16((readl(&regs->wValueH)  << 8)  in ep0_setup()
1440 					| readl(&regs->wValueL));  in ep0_setup()
1441 	ctrl.wIndex  = cpu_to_le16((readl(&regs->wIndexH)  << 8)  in ep0_setup()
1442 					| readl(&regs->wIndexL));  in ep0_setup()
1443 	ctrl.wLength = cpu_to_le16((readl(&regs->wLengthH) << 8)  in ep0_setup()
1444 					| readl(&regs->wLengthL));  in ep0_setup()
1557 	stat = readl(&regs->int_status) & dev->int_enable;  in goku_irq()
1575 			if (readl(&dev->regs->power_detect) & PW_DETECT) {  in goku_irq()
1592 			if (readl(&regs->ep_status[0]) & EPxSTATUS_SUSPEND) {  in goku_irq()
1700 	(void)readl(&regs->int_enable);  in goku_irq()
1704 				readl(&regs->int_status), dev->int_enable);  in goku_irq()