701 struct dwc2_hsotg {  struct
716 	struct dwc2_hsotg_plat *plat;  argument
717 	struct regulator_bulk_data supplies[ARRAY_SIZE(dwc2_hsotg_supply_names)];  argument
718 	u32 phyif;
720 	spinlock_t lock;
721 	void *priv;
722 	int     irq;
723 	struct clk *clk;
725 	unsigned int queuing_high_bandwidth:1;
726 	unsigned int srp_success:1;
728 	struct workqueue_struct *wq_otg;
729 	struct work_struct wf_otg;
730 	struct timer_list wkp_timer;
731 	enum dwc2_lx_state lx_state;
732 	struct dwc2_gregs_backup gr_backup;
733 	struct dwc2_dregs_backup dr_backup;
734 	struct dwc2_hregs_backup hr_backup;
736 	struct dentry *debug_root;
737 	struct debugfs_regset32 *regset;
747 	union dwc2_hcd_internal_flags {
759 	} flags;
761 	struct list_head non_periodic_sched_inactive;
762 	struct list_head non_periodic_sched_active;
763 	struct list_head *non_periodic_qh_ptr;
764 	struct list_head periodic_sched_inactive;
765 	struct list_head periodic_sched_ready;
766 	struct list_head periodic_sched_assigned;
767 	struct list_head periodic_sched_queued;
768 	u16 periodic_usecs;
769 	u16 frame_usecs[8];
770 	u16 frame_number;
771 	u16 periodic_qh_count;
772 	bool bus_suspended;
776 	u16 last_frame_num;
777 	u16 *frame_num_array;
778 	u16 *last_frame_num_array;
779 	int frame_num_idx;
780 	int dumped_frame_num_array;
783 	struct list_head free_hc_list;
784 	int periodic_channels;
785 	int non_periodic_channels;
786 	int available_host_channels;
787 	struct dwc2_host_chan *hc_ptr_array[MAX_EPS_CHANNELS];
788 	u8 *status_buf;
789 	dma_addr_t status_buf_dma;
792 	struct delayed_work start_work;
793 	struct delayed_work reset_work;
794 	u8 otg_port;
795 	u32 *frame_list;
796 	dma_addr_t frame_list_dma;
799 	u32 frrem_samples;
800 	u64 frrem_accum;
802 	u32 hfnum_7_samples_a;
803 	u64 hfnum_7_frrem_accum_a;
804 	u32 hfnum_0_samples_a;
805 	u64 hfnum_0_frrem_accum_a;
806 	u32 hfnum_other_samples_a;
807 	u64 hfnum_other_frrem_accum_a;
809 	u32 hfnum_7_samples_b;
810 	u64 hfnum_7_frrem_accum_b;
811 	u32 hfnum_0_samples_b;
812 	u64 hfnum_0_frrem_accum_b;
836 	struct dwc2_hsotg_ep *eps_in[MAX_EPS_CHANNELS];  argument
837 	struct dwc2_hsotg_ep *eps_out[MAX_EPS_CHANNELS];  argument
838 	u32 g_using_dma;
839 	u32 g_rx_fifo_sz;
840 	u32 g_np_g_tx_fifo_sz;
841 	u32 g_tx_fifo_sz[MAX_EPS_CHANNELS];