490 	dev_vdbg(hsotg->dev, "%s()\n", __func__);  in dwc2_core_reset()
1147 		dev_vdbg(hsotg->dev, "control/bulk\n");  in dwc2_hc_enable_slave_ints()
1175 			dev_vdbg(hsotg->dev, "intr\n");  in dwc2_hc_enable_slave_ints()
1197 			dev_vdbg(hsotg->dev, "isoc\n");  in dwc2_hc_enable_slave_ints()
1214 		dev_vdbg(hsotg->dev, "set HCINTMSK to %08x\n", hcintmsk);  in dwc2_hc_enable_slave_ints()
1228 			dev_vdbg(hsotg->dev, "desc DMA disabled\n");  in dwc2_hc_enable_dma_ints()
1232 			dev_vdbg(hsotg->dev, "desc DMA enabled\n");  in dwc2_hc_enable_dma_ints()
1240 			dev_vdbg(hsotg->dev, "setting ACK\n");  in dwc2_hc_enable_dma_ints()
1251 		dev_vdbg(hsotg->dev, "set HCINTMSK to %08x\n", hcintmsk);  in dwc2_hc_enable_dma_ints()
1261 			dev_vdbg(hsotg->dev, "DMA enabled\n");  in dwc2_hc_enable_ints()
1265 			dev_vdbg(hsotg->dev, "DMA disabled\n");  in dwc2_hc_enable_ints()
1274 		dev_vdbg(hsotg->dev, "set HAINTMSK to %08x\n", intmsk);  in dwc2_hc_enable_ints()
1281 		dev_vdbg(hsotg->dev, "set GINTMSK to %08x\n", intmsk);  in dwc2_hc_enable_ints()
1303 		dev_vdbg(hsotg->dev, "%s()\n", __func__);  in dwc2_hc_init()
1327 		dev_vdbg(hsotg->dev, "set HCCHAR(%d) to %08x\n",  in dwc2_hc_init()
1330 		dev_vdbg(hsotg->dev, "%s: Channel %d\n",  in dwc2_hc_init()
1332 		dev_vdbg(hsotg->dev, "	 Dev Addr: %d\n",  in dwc2_hc_init()
1334 		dev_vdbg(hsotg->dev, "	 Ep Num: %d\n",  in dwc2_hc_init()
1336 		dev_vdbg(hsotg->dev, "	 Is In: %d\n",  in dwc2_hc_init()
1338 		dev_vdbg(hsotg->dev, "	 Is Low Speed: %d\n",  in dwc2_hc_init()
1340 		dev_vdbg(hsotg->dev, "	 Ep Type: %d\n",  in dwc2_hc_init()
1342 		dev_vdbg(hsotg->dev, "	 Max Pkt: %d\n",  in dwc2_hc_init()
1349 			dev_vdbg(hsotg->dev,  in dwc2_hc_init()
1362 			dev_vdbg(hsotg->dev, "	  comp split %d\n",  in dwc2_hc_init()
1364 			dev_vdbg(hsotg->dev, "	  xact pos %d\n",  in dwc2_hc_init()
1366 			dev_vdbg(hsotg->dev, "	  hub addr %d\n",  in dwc2_hc_init()
1368 			dev_vdbg(hsotg->dev, "	  hub port %d\n",  in dwc2_hc_init()
1370 			dev_vdbg(hsotg->dev, "	  is_in %d\n",  in dwc2_hc_init()
1372 			dev_vdbg(hsotg->dev, "	  Max Pkt %d\n",  in dwc2_hc_init()
1374 			dev_vdbg(hsotg->dev, "	  xferlen %d\n",  in dwc2_hc_init()
1416 		dev_vdbg(hsotg->dev, "%s()\n", __func__);  in dwc2_hc_halt()
1430 		dev_vdbg(hsotg->dev, "dequeue/error\n");  in dwc2_hc_halt()
1469 		dev_vdbg(hsotg->dev,  in dwc2_hc_halt()
1481 			dev_vdbg(hsotg->dev, "desc DMA disabled\n");  in dwc2_hc_halt()
1491 			dev_vdbg(hsotg->dev, "DMA not enabled\n");  in dwc2_hc_halt()
1497 			dev_vdbg(hsotg->dev, "control/bulk\n");  in dwc2_hc_halt()
1500 				dev_vdbg(hsotg->dev, "Disabling channel\n");  in dwc2_hc_halt()
1505 				dev_vdbg(hsotg->dev, "isoc/intr\n");  in dwc2_hc_halt()
1510 					dev_vdbg(hsotg->dev, "Disabling channel\n");  in dwc2_hc_halt()
1516 			dev_vdbg(hsotg->dev, "DMA enabled\n");  in dwc2_hc_halt()
1524 			dev_vdbg(hsotg->dev, "Channel enabled\n");  in dwc2_hc_halt()
1529 			dev_vdbg(hsotg->dev, "Channel disabled\n");  in dwc2_hc_halt()
1534 		dev_vdbg(hsotg->dev, "%s: Channel %d\n", __func__,  in dwc2_hc_halt()
1536 		dev_vdbg(hsotg->dev, "	 hcchar: 0x%08x\n",  in dwc2_hc_halt()
1538 		dev_vdbg(hsotg->dev, "	 halt_pending: %d\n",  in dwc2_hc_halt()
1540 		dev_vdbg(hsotg->dev, "	 halt_on_queue: %d\n",  in dwc2_hc_halt()
1542 		dev_vdbg(hsotg->dev, "	 halt_status: %d\n",  in dwc2_hc_halt()
1640 		dev_vdbg(hsotg->dev, "%s()\n", __func__);  in dwc2_hc_write_packet()
1712 		dev_vdbg(hsotg->dev, "%s()\n", __func__);  in dwc2_hc_start_transfer()
1717 				dev_vdbg(hsotg->dev, "ping, no DMA\n");  in dwc2_hc_start_transfer()
1723 				dev_vdbg(hsotg->dev, "ping, DMA\n");  in dwc2_hc_start_transfer()
1730 			dev_vdbg(hsotg->dev, "split\n");  in dwc2_hc_start_transfer()
1748 			dev_vdbg(hsotg->dev, "no split\n");  in dwc2_hc_start_transfer()
1816 		dev_vdbg(hsotg->dev, "Wrote %08x to HCTSIZ(%d)\n",  in dwc2_hc_start_transfer()
1819 		dev_vdbg(hsotg->dev, "%s: Channel %d\n", __func__,  in dwc2_hc_start_transfer()
1821 		dev_vdbg(hsotg->dev, "	 Xfer Size: %d\n",  in dwc2_hc_start_transfer()
1824 		dev_vdbg(hsotg->dev, "	 Num Pkts: %d\n",  in dwc2_hc_start_transfer()
1827 		dev_vdbg(hsotg->dev, "	 Start PID: %d\n",  in dwc2_hc_start_transfer()
1837 				dev_vdbg(hsotg->dev, "align_buf\n");  in dwc2_hc_start_transfer()
1844 			dev_vdbg(hsotg->dev, "Wrote %08lx to HCDMA(%d)\n",  in dwc2_hc_start_transfer()
1872 		dev_vdbg(hsotg->dev, "	 Multi Cnt: %d\n",  in dwc2_hc_start_transfer()
1878 		dev_vdbg(hsotg->dev, "Wrote %08x to HCCHAR(%d)\n", hcchar,  in dwc2_hc_start_transfer()
1928 		dev_vdbg(hsotg->dev, "%s: Channel %d\n", __func__,  in dwc2_hc_start_transfer_ddma()
1930 		dev_vdbg(hsotg->dev, "	 Start PID: %d\n",  in dwc2_hc_start_transfer_ddma()
1932 		dev_vdbg(hsotg->dev, "	 NTD: %d\n", chan->ntd - 1);  in dwc2_hc_start_transfer_ddma()
1943 		dev_vdbg(hsotg->dev, "Wrote %08x to HCDMA(%d)\n",  in dwc2_hc_start_transfer_ddma()
1961 		dev_vdbg(hsotg->dev, "	 Multi Cnt: %d\n",  in dwc2_hc_start_transfer_ddma()
1967 		dev_vdbg(hsotg->dev, "Wrote %08x to HCCHAR(%d)\n", hcchar,  in dwc2_hc_start_transfer_ddma()
1998 		dev_vdbg(hsotg->dev, "%s: Channel %d\n", __func__,  in dwc2_hc_continue_transfer()
2028 			dev_vdbg(hsotg->dev, "	 IN xfer: hcchar = 0x%08x\n",  in dwc2_hc_continue_transfer()
2071 		dev_vdbg(hsotg->dev, "%s: Channel %d\n", __func__,  in dwc2_hc_do_ping()
2155 	dev_vdbg(hsotg->dev, "%s(%p,%p,%d)\n", __func__, hsotg, dest, bytes);  in dwc2_read_packet()
2337 	dev_vdbg(hsotg->dev, "Flush Tx FIFO %d\n", num);  in dwc2_flush_tx_fifo()
2369 	dev_vdbg(hsotg->dev, "%s()\n", __func__);  in dwc2_flush_rx_fifo()