218 	unsigned char ie1_value;  member
2105 	unsigned char status = read_reg(info, SR1) & info->ie1_value & (FLGD + IDLD + CDCD + BRKD);  in isr_rxint()
2240 	info->ie1_value &= ~(IDLE + UDRN);  in isr_txeom()
2241 	write_reg16(info, IE0, (unsigned short)((info->ie1_value << 8) + info->ie0_value));  in isr_txeom()
2284 	unsigned char status = read_reg(info, SR1) & info->ie1_value & (UDRN + IDLE + CCTS);  in isr_txint()
2319 		info->ie1_value |= IDLE;  in isr_txrdy()
2320 		write_reg16(info, IE0, (unsigned short)((info->ie1_value << 8) + info->ie0_value));  in isr_txrdy()
2439 				info->ie1_value &= ~CDCD;  in isr_io_pin()
2440 				write_reg(info, IE1, info->ie1_value);  in isr_io_pin()
2459 				info->ie1_value &= ~CCTS;  in isr_io_pin()
2460 				write_reg(info, IE1, info->ie1_value);  in isr_io_pin()
2739 	info->ie1_value |= (CDCD|CCTS);  in program_hw()
2740 	write_reg(info, IE1, info->ie1_value);  in program_hw()
2988 		info->ie1_value &= ~UDRN;  in tx_abort()
2989 		info->ie1_value |= IDLE;  in tx_abort()
2990 		write_reg(info, IE1, info->ie1_value);	/* disable tx status interrupts */  in tx_abort()
3066 		unsigned char oldval = info->ie1_value;  in wait_mgsl_event()
3071 			info->ie1_value = newval;  in wait_mgsl_event()
3072 			write_reg(info, IE1, info->ie1_value);  in wait_mgsl_event()
3136 			info->ie1_value &= ~(FLGD|IDLD);  in wait_mgsl_event()
3137 			write_reg(info, IE1, info->ie1_value);  in wait_mgsl_event()
4240 			info->ie1_value &= ~IDLE;  in tx_start()
4241 			info->ie1_value |= UDRN;  in tx_start()
4242 			write_reg(info, IE1, info->ie1_value);  in tx_start()
4277 	info->ie1_value &= ~(UDRN + IDLE);  in tx_stop()
4278 	write_reg(info, IE1, info->ie1_value);	/* disable tx status interrupts */  in tx_stop()
4352 		info->ie1_value = 0;  in reset_port()
4355 		write_reg(info, IE1, info->ie1_value);  in reset_port()
4503 	info->ie1_value = BRKD;  in async_mode()
4504 	write_reg(info, IE1, info->ie1_value);  in async_mode()