Lines Matching refs:RXDMA
385 #define RXDMA 0x00 macro
2346 unsigned char status = read_reg(info,RXDMA + DSR) & 0xc0; in isr_rxdmaok()
2349 write_reg(info, RXDMA + DSR, (unsigned char)(status | 1)); in isr_rxdmaok()
2363 unsigned char status = read_reg(info,RXDMA + DSR) & 0x30; in isr_rxdmaerror()
2366 write_reg(info, RXDMA + DSR, (unsigned char)(status | 1)); in isr_rxdmaerror()
4127 write_reg(info, RXDMA + DSR, 0); /* disable Rx DMA */ in rx_stop()
4128 write_reg(info, RXDMA + DCMD, SWABORT); /* reset/init Rx DMA */ in rx_stop()
4129 write_reg(info, RXDMA + DIR, 0); /* disable Rx DMA interrupts */ in rx_stop()
4153 write_reg(info, RXDMA + DSR, 0); /* disable Rx DMA */ in rx_start()
4154 write_reg(info, RXDMA + DCMD, SWABORT); /* reset/init Rx DMA */ in rx_start()
4167 write_reg16(info, RXDMA + CDA, in rx_start()
4171 write_reg16(info, RXDMA + EDA, in rx_start()
4175 write_reg16(info, RXDMA + BFL, SCABUFSIZE); in rx_start()
4177 write_reg(info, RXDMA + DIR, 0x60); /* enable Rx DMA interrupts (EOM/BOF) */ in rx_start()
4178 write_reg(info, RXDMA + DSR, 0xf2); /* clear Rx DMA IRQs, enable Rx DMA */ in rx_start()
4528 write_reg(info, RXDMA + DIR, 0); in hdlc_mode()
4670 write_reg(info, RXDMA + DMR, 0x14); in hdlc_mode()
4673 write_reg(info, RXDMA + CPB, in hdlc_mode()
4817 write_reg16(info, RXDMA + EDA, info->rx_buf_list_ex[first].phys_entry); in rx_free_frame_buffers()