Lines Matching refs:TCR
395 #define TCR 0x82 /* tx control */ macro
1413 value = rd_reg16(info, TCR); in set_break()
1418 wr_reg16(info, TCR, value); in set_break()
2297 unsigned short val = rd_reg16(info, TCR); in isr_txeom()
2298 wr_reg16(info, TCR, (unsigned short)(val | BIT2)); /* set reset bit */ in isr_txeom()
2299 wr_reg16(info, TCR, val); /* clear reset bit */ in isr_txeom()
2889 val = rd_reg16(info, TCR); in set_interface()
2894 wr_reg16(info, TCR, val); in set_interface()
4046 wr_reg16(info, TCR, in tx_start()
4047 (unsigned short)((rd_reg16(info, TCR) | BIT1) & ~BIT2)); in tx_start()
4090 val = rd_reg16(info, TCR) & ~BIT1; /* clear enable bit */ in tx_stop()
4091 wr_reg16(info, TCR, (unsigned short)(val | BIT2)); /* set reset bit */ in tx_stop()
4177 wr_reg16(info, TCR, val); in async_mode()
4339 wr_reg16(info, TCR, val); in sync_mode()
4501 tcr = rd_reg16(info, TCR); in tx_set_idle()
4511 wr_reg16(info, TCR, tcr); in tx_set_idle()
5000 wr_reg16(info, TCR, in irq_test()
5001 (unsigned short)(rd_reg16(info, TCR) | BIT1)); in irq_test()