Lines Matching defs:mgsl_struct
179 struct mgsl_struct { struct
199 struct mgsl_struct *next_device; /* device list link */ argument
201 spinlock_t irq_spinlock; /* spinlock for synchronizing with ISR */
202 struct work_struct task; /* task structure for scheduling bh */
204 u32 EventMask; /* event trigger mask */
205 u32 RecordedEvents; /* pending events */
207 u32 max_frame_size; /* as set by device config */
209 u32 pending_bh;
211 bool bh_running; /* Protection from multiple */
212 int isr_overflow;
213 bool bh_requested;
215 int dcd_chkcount; /* check counts to prevent */
216 int cts_chkcount; /* too many IRQs if a signal */
217 int dsr_chkcount; /* is floating */
218 int ri_chkcount;
220 char *buffer_list; /* virtual address of Rx & Tx buffer lists */
221 u32 buffer_list_phys;
222 dma_addr_t buffer_list_dma_addr;
224 unsigned int rx_buffer_count; /* count of total allocated Rx buffers */
225 DMABUFFERENTRY *rx_buffer_list; /* list of receive buffer entries */
226 unsigned int current_rx_buffer;
228 int num_tx_dma_buffers; /* number of tx dma frames required */
229 int tx_dma_buffers_used;
230 unsigned int tx_buffer_count; /* count of total allocated Tx buffers */
231 DMABUFFERENTRY *tx_buffer_list; /* list of transmit buffer entries */
232 int start_tx_dma_buffer; /* tx dma buffer to start tx dma operation */
233 int current_tx_buffer; /* next tx dma buffer to be loaded */
235 unsigned char *intermediate_rxbuffer;
237 int num_tx_holding_buffers; /* number of tx holding buffer allocated */
238 int get_tx_holding_index; /* next tx holding buffer for adapter to load */
239 int put_tx_holding_index; /* next tx holding buffer to store user request */
240 int tx_holding_count; /* number of tx holding buffers waiting */
241 struct tx_holding_buffer tx_holding_buffers[MAX_TX_HOLDING_BUFFERS];
243 bool rx_enabled;
244 bool rx_overflow;
245 bool rx_rcc_underrun;
247 bool tx_enabled;
248 bool tx_active;
249 u32 idle_mode;
251 u16 cmr_value;
252 u16 tcsr_value;
254 char device_name[25]; /* device instance name */
256 unsigned int bus_type; /* expansion bus type (ISA,EISA,PCI) */
257 unsigned char bus; /* expansion bus number (zero based) */
258 unsigned char function; /* PCI device number */
260 unsigned int io_base; /* base I/O address of adapter */
261 unsigned int io_addr_size; /* size of the I/O address range */
262 bool io_addr_requested; /* true if I/O address requested */
264 unsigned int irq_level; /* interrupt level */
265 unsigned long irq_flags;
266 bool irq_requested; /* true if IRQ requested */
268 unsigned int dma_level; /* DMA channel */
269 bool dma_requested; /* true if dma channel requested */
271 u16 mbre_bit;
272 u16 loopback_bits;
273 u16 usc_idle_mode;
275 MGSL_PARAMS params; /* communications parameters */
277 unsigned char serial_signals; /* current serial signal states */
279 bool irq_occurred; /* for diagnostics use */
280 unsigned int init_error; /* Initialization startup error (DIAGS) */
281 int fDiagnosticsmode; /* Driver in Diagnostic mode? (DIAGS) */
283 u32 last_mem_alloc;
284 unsigned char* memory_base; /* shared memory address (PCI only) */
285 u32 phys_memory_base;
286 bool shared_mem_requested;
288 unsigned char* lcr_base; /* local config registers (PCI only) */
289 u32 phys_lcr_base;
290 u32 lcr_offset;
291 bool lcr_mem_requested;
293 u32 misc_ctrl_value;
294 char *flag_buf;
295 bool drop_rts_on_tx_done;
297 bool loopmode_insert_requested;
298 bool loopmode_send_done_requested;
300 struct _input_signal_events input_signal_events;
303 int netcount;
304 spinlock_t netlock;
307 struct net_device *netdev;