54 	u32 ier = ioread32(port->membase + TIMBUART_IER) & ~RXFLAGS;  in timbuart_stop_rx()
55 	iowrite32(ier, port->membase + TIMBUART_IER);  in timbuart_stop_rx()
61 	u32 ier = ioread32(port->membase + TIMBUART_IER) & ~TXBAE;  in timbuart_stop_tx()
62 	iowrite32(ier, port->membase + TIMBUART_IER);  in timbuart_stop_tx()
76 	u32 isr = ioread32(port->membase + TIMBUART_ISR);  in timbuart_tx_empty()
84 		u8 ctl = ioread8(port->membase + TIMBUART_CTRL) |  in timbuart_flush_buffer()
87 		iowrite8(ctl, port->membase + TIMBUART_CTRL);  in timbuart_flush_buffer()
88 		iowrite32(TXBF, port->membase + TIMBUART_ISR);  in timbuart_flush_buffer()
96 	while (ioread32(port->membase + TIMBUART_ISR) & RXDP) {  in timbuart_rx_chars()
97 		u8 ch = ioread8(port->membase + TIMBUART_RXFIFO);  in timbuart_rx_chars()
114 	while (!(ioread32(port->membase + TIMBUART_ISR) & TXBF) &&  in timbuart_tx_chars()
117 			port->membase + TIMBUART_TXFIFO);  in timbuart_tx_chars()
126 		ioread8(port->membase + TIMBUART_CTRL),  in timbuart_tx_chars()
128 		ioread8(port->membase + TIMBUART_BAUDRATE));  in timbuart_tx_chars()
146 		iowrite32(TXFLAGS, port->membase + TIMBUART_ISR);  in timbuart_handle_tx_port()
170 			u8 ctl = ioread8(port->membase + TIMBUART_CTRL) |  in timbuart_handle_rx_port()
172 			iowrite8(ctl, port->membase + TIMBUART_CTRL);  in timbuart_handle_rx_port()
178 		iowrite32(RXFLAGS, port->membase + TIMBUART_ISR);  in timbuart_handle_rx_port()
194 	isr = ioread32(uart->port.membase + TIMBUART_ISR);  in timbuart_tasklet()
205 	iowrite32(ier, uart->port.membase + TIMBUART_IER);  in timbuart_tasklet()
213 	u8 cts = ioread8(port->membase + TIMBUART_CTRL);  in timbuart_get_mctrl()
227 		iowrite8(TIMBUART_CTRL_RTS, port->membase + TIMBUART_CTRL);  in timbuart_set_mctrl()
229 		iowrite8(0, port->membase + TIMBUART_CTRL);  in timbuart_set_mctrl()
238 		iowrite32(CTS_DELTA, port->membase + TIMBUART_ISR);  in timbuart_mctrl_check()
259 	iowrite8(TIMBUART_CTRL_FLSHRX, port->membase + TIMBUART_CTRL);  in timbuart_startup()
260 	iowrite32(0x1ff, port->membase + TIMBUART_ISR);  in timbuart_startup()
263 		port->membase + TIMBUART_IER);  in timbuart_startup()
275 	iowrite32(0, port->membase + TIMBUART_IER);  in timbuart_shutdown()
314 	iowrite8((u8)bindex, port->membase + TIMBUART_BAUDRATE);  in timbuart_set_termios()
334 		iounmap(port->membase);  in timbuart_release_port()
335 		port->membase = NULL;  in timbuart_release_port()
351 		port->membase = ioremap(port->mapbase, size);  in timbuart_request_port()
352 		if (port->membase == NULL) {  in timbuart_request_port()
365 	if (ioread8(uart->port.membase + TIMBUART_IPR)) {  in timbuart_handleinterrupt()
366 		uart->last_ier = ioread32(uart->port.membase + TIMBUART_IER);  in timbuart_handleinterrupt()
369 		iowrite32(0, uart->port.membase + TIMBUART_IER);  in timbuart_handleinterrupt()
457 	uart->port.membase = NULL;  in timbuart_probe()