Lines Matching refs:BIT
36 #define SCSMR_CHR BIT(6) /* 7-bit Character Length */
37 #define SCSMR_PE BIT(5) /* Parity Enable */
38 #define SCSMR_ODD BIT(4) /* Odd Parity */
39 #define SCSMR_STOP BIT(3) /* Stop Bit Length */
43 #define SCSCR_TDRQE BIT(15) /* Tx Data Transfer Request Enable */
44 #define SCSCR_RDRQE BIT(14) /* Rx Data Transfer Request Enable */
47 #define SCI_TDRE BIT(7) /* Transmit Data Register Empty */
48 #define SCI_RDRF BIT(6) /* Receive Data Register Full */
49 #define SCI_ORER BIT(5) /* Overrun Error */
50 #define SCI_FER BIT(4) /* Framing Error */
51 #define SCI_PER BIT(3) /* Parity Error */
52 #define SCI_TEND BIT(2) /* Transmit End */
63 #define SCIF_ER BIT(7) /* Receive Error */
64 #define SCIF_TEND BIT(6) /* Transmission End */
65 #define SCIF_TDFE BIT(5) /* Transmit FIFO Data Empty */
66 #define SCIF_BRK BIT(4) /* Break Detect */
67 #define SCIF_FER BIT(3) /* Framing Error */
68 #define SCIF_PER BIT(2) /* Parity Error */
69 #define SCIF_RDF BIT(1) /* Receive FIFO Data Full */
70 #define SCIF_DR BIT(0) /* Receive Data Ready */
75 #define SCIFA_ORER BIT(9) /* Overrun Error */
85 #define SCFCR_MCE BIT(3) /* Modem Control Enable */
86 #define SCFCR_TFRST BIT(2) /* Transmit FIFO Data Register Reset */
87 #define SCFCR_RFRST BIT(1) /* Receive FIFO Data Register Reset */
88 #define SCFCR_LOOP BIT(0) /* Loopback Test */
91 #define SCLSR_ORER BIT(0) /* Overrun Error */
94 #define SCSPTR_RTSIO BIT(7) /* Serial Port RTS Pin Input/Output */
95 #define SCSPTR_RTSDT BIT(6) /* Serial Port RTS Pin Data */
96 #define SCSPTR_CTSIO BIT(5) /* Serial Port CTS Pin Input/Output */
97 #define SCSPTR_CTSDT BIT(4) /* Serial Port CTS Pin Data */
98 #define SCSPTR_SPB2IO BIT(1) /* Serial Port Break Input/Output */
99 #define SCSPTR_SPB2DT BIT(0) /* Serial Port Break Data */
102 #define HSCIF_SRE BIT(15) /* Sampling Rate Register Enable */
105 #define SCPCR_RTSC BIT(4) /* Serial Port RTS Pin / Output Pin */
106 #define SCPCR_CTSC BIT(3) /* Serial Port CTS Pin / Input Pin */
109 #define SCPDR_RTSD BIT(4) /* Serial Port RTS Output Pin Data */
110 #define SCPDR_CTSD BIT(3) /* Serial Port CTS Input Pin Data */