Lines Matching refs:u
202 static void mxs_auart_stop_tx(struct uart_port *u);
204 #define to_auart_port(u) container_of(u, struct mxs_auart_port, port) argument
389 static int mxs_auart_request_port(struct uart_port *u) in mxs_auart_request_port() argument
394 static int mxs_auart_verify_port(struct uart_port *u, in mxs_auart_verify_port() argument
397 if (u->type != PORT_UNKNOWN && u->type != PORT_IMX) in mxs_auart_verify_port()
402 static void mxs_auart_config_port(struct uart_port *u, int flags) in mxs_auart_config_port() argument
406 static const char *mxs_auart_type(struct uart_port *u) in mxs_auart_type() argument
408 struct mxs_auart_port *s = to_auart_port(u); in mxs_auart_type()
413 static void mxs_auart_release_port(struct uart_port *u) in mxs_auart_release_port() argument
417 static void mxs_auart_set_mctrl(struct uart_port *u, unsigned mctrl) in mxs_auart_set_mctrl() argument
419 struct mxs_auart_port *s = to_auart_port(u); in mxs_auart_set_mctrl()
421 u32 ctrl = readl(u->membase + AUART_CTRL2); in mxs_auart_set_mctrl()
425 if (uart_cts_enabled(u)) in mxs_auart_set_mctrl()
431 writel(ctrl, u->membase + AUART_CTRL2); in mxs_auart_set_mctrl()
459 static u32 mxs_auart_get_mctrl(struct uart_port *u) in mxs_auart_get_mctrl() argument
461 struct mxs_auart_port *s = to_auart_port(u); in mxs_auart_get_mctrl()
462 u32 stat = readl(u->membase + AUART_STAT); in mxs_auart_get_mctrl()
658 static void mxs_auart_settermios(struct uart_port *u, in mxs_auart_settermios() argument
662 struct mxs_auart_port *s = to_auart_port(u); in mxs_auart_settermios()
669 ctrl2 = readl(u->membase + AUART_CTRL2); in mxs_auart_settermios()
698 u->read_status_mask = 0; in mxs_auart_settermios()
701 u->read_status_mask |= AUART_STAT_PERR; in mxs_auart_settermios()
703 u->read_status_mask |= AUART_STAT_BERR; in mxs_auart_settermios()
708 u->ignore_status_mask = 0; in mxs_auart_settermios()
710 u->ignore_status_mask |= AUART_STAT_PERR; in mxs_auart_settermios()
712 u->ignore_status_mask |= AUART_STAT_BERR; in mxs_auart_settermios()
718 u->ignore_status_mask |= AUART_STAT_OERR; in mxs_auart_settermios()
757 baud_min = DIV_ROUND_UP(u->uartclk * 32, AUART_LINECTRL_BAUD_DIV_MAX); in mxs_auart_settermios()
758 baud_max = u->uartclk * 32 / AUART_LINECTRL_BAUD_DIV_MIN; in mxs_auart_settermios()
759 baud = uart_get_baud_rate(u, termios, old, baud_min, baud_max); in mxs_auart_settermios()
760 div = u->uartclk * 32 / baud; in mxs_auart_settermios()
764 writel(ctrl, u->membase + AUART_LINECTRL); in mxs_auart_settermios()
765 writel(ctrl2, u->membase + AUART_CTRL2); in mxs_auart_settermios()
767 uart_update_timeout(u, termios->c_cflag, baud); in mxs_auart_settermios()
775 u->membase + AUART_INTR_CLR); in mxs_auart_settermios()
783 if (UART_ENABLE_MS(u, termios->c_cflag)) in mxs_auart_settermios()
784 mxs_auart_enable_ms(u); in mxs_auart_settermios()
786 mxs_auart_disable_ms(u); in mxs_auart_settermios()
849 static void mxs_auart_reset_deassert(struct uart_port *u) in mxs_auart_reset_deassert() argument
854 writel(AUART_CTRL0_SFTRST, u->membase + AUART_CTRL0_CLR); in mxs_auart_reset_deassert()
857 reg = readl(u->membase + AUART_CTRL0); in mxs_auart_reset_deassert()
862 writel(AUART_CTRL0_CLKGATE, u->membase + AUART_CTRL0_CLR); in mxs_auart_reset_deassert()
865 static void mxs_auart_reset_assert(struct uart_port *u) in mxs_auart_reset_assert() argument
870 reg = readl(u->membase + AUART_CTRL0); in mxs_auart_reset_assert()
875 writel(AUART_CTRL0_CLKGATE, u->membase + AUART_CTRL0_CLR); in mxs_auart_reset_assert()
876 writel(AUART_CTRL0_SFTRST, u->membase + AUART_CTRL0_SET); in mxs_auart_reset_assert()
879 reg = readl(u->membase + AUART_CTRL0); in mxs_auart_reset_assert()
886 dev_err(u->dev, "Failed to reset the unit."); in mxs_auart_reset_assert()
889 static int mxs_auart_startup(struct uart_port *u) in mxs_auart_startup() argument
892 struct mxs_auart_port *s = to_auart_port(u); in mxs_auart_startup()
898 if (uart_console(u)) { in mxs_auart_startup()
899 writel(AUART_CTRL0_CLKGATE, u->membase + AUART_CTRL0_CLR); in mxs_auart_startup()
902 mxs_auart_reset_assert(u); in mxs_auart_startup()
903 mxs_auart_reset_deassert(u); in mxs_auart_startup()
906 writel(AUART_CTRL2_UARTEN, u->membase + AUART_CTRL2_SET); in mxs_auart_startup()
909 u->membase + AUART_INTR); in mxs_auart_startup()
912 u->fifosize = MXS_AUART_FIFO_SIZE; in mxs_auart_startup()
918 writel(AUART_LINECTRL_FEN, u->membase + AUART_LINECTRL_SET); in mxs_auart_startup()
927 static void mxs_auart_shutdown(struct uart_port *u) in mxs_auart_shutdown() argument
929 struct mxs_auart_port *s = to_auart_port(u); in mxs_auart_shutdown()
931 mxs_auart_disable_ms(u); in mxs_auart_shutdown()
936 if (uart_console(u)) { in mxs_auart_shutdown()
937 writel(AUART_CTRL2_UARTEN, u->membase + AUART_CTRL2_CLR); in mxs_auart_shutdown()
939 u->membase + AUART_INTR_CLR); in mxs_auart_shutdown()
940 writel(AUART_CTRL0_CLKGATE, u->membase + AUART_CTRL0_SET); in mxs_auart_shutdown()
942 mxs_auart_reset_assert(u); in mxs_auart_shutdown()
948 static unsigned int mxs_auart_tx_empty(struct uart_port *u) in mxs_auart_tx_empty() argument
950 if ((readl(u->membase + AUART_STAT) & in mxs_auart_tx_empty()
957 static void mxs_auart_start_tx(struct uart_port *u) in mxs_auart_start_tx() argument
959 struct mxs_auart_port *s = to_auart_port(u); in mxs_auart_start_tx()
962 writel(AUART_CTRL2_TXE, u->membase + AUART_CTRL2_SET); in mxs_auart_start_tx()
967 static void mxs_auart_stop_tx(struct uart_port *u) in mxs_auart_stop_tx() argument
969 writel(AUART_CTRL2_TXE, u->membase + AUART_CTRL2_CLR); in mxs_auart_stop_tx()
972 static void mxs_auart_stop_rx(struct uart_port *u) in mxs_auart_stop_rx() argument
974 writel(AUART_CTRL2_RXE, u->membase + AUART_CTRL2_CLR); in mxs_auart_stop_rx()
977 static void mxs_auart_break_ctl(struct uart_port *u, int ctl) in mxs_auart_break_ctl() argument
981 u->membase + AUART_LINECTRL_SET); in mxs_auart_break_ctl()
984 u->membase + AUART_LINECTRL_CLR); in mxs_auart_break_ctl()