298 	while (!(readl(s->port.membase + AUART_STAT) &  in mxs_auart_tx_chars()
335 	c = readl(s->port.membase + AUART_DATA);  in mxs_auart_rx_char()
336 	stat = readl(s->port.membase + AUART_STAT);  in mxs_auart_rx_char()
379 		stat = readl(s->port.membase + AUART_STAT);  in mxs_auart_rx_chars()
421 	u32 ctrl = readl(u->membase + AUART_CTRL2);  in mxs_auart_set_mctrl()
462 	u32 stat = readl(u->membase + AUART_STAT);  in mxs_auart_get_mctrl()
539 	stat = readl(s->port.membase + AUART_STAT);  in dma_rx_callback()
669 	ctrl2 = readl(u->membase + AUART_CTRL2);  in mxs_auart_settermios()
805 	u32 stat = readl(s->port.membase + AUART_STAT);  in mxs_auart_irq_handle()
807 	istat = readl(s->port.membase + AUART_INTR);  in mxs_auart_irq_handle()
857 		reg = readl(u->membase + AUART_CTRL0);  in mxs_auart_reset_deassert()
870 	reg = readl(u->membase + AUART_CTRL0);  in mxs_auart_reset_assert()
879 		reg = readl(u->membase + AUART_CTRL0);  in mxs_auart_reset_assert()
950 	if ((readl(u->membase + AUART_STAT) &  in mxs_auart_tx_empty()
1014 	while (readl(port->membase + AUART_STAT) & AUART_STAT_TXFF) {  in mxs_auart_console_putchar()
1040 	old_ctrl2 = readl(port->membase + AUART_CTRL2);  in auart_console_write()
1041 	old_ctrl0 = readl(port->membase + AUART_CTRL0);  in auart_console_write()
1051 	while (readl(port->membase + AUART_STAT) & AUART_STAT_BUSY) {  in auart_console_write()
1063 	if (!(readl(port->membase + AUART_STAT) & AUART_STAT_BUSY)) {  in auart_console_write()
1077 	if (!(readl(port->membase + AUART_CTRL2) & AUART_CTRL2_UARTEN))  in auart_console_get_options()
1080 	lcr_h = readl(port->membase + AUART_LINECTRL);  in auart_console_get_options()
1095 	quot = ((readl(port->membase + AUART_LINECTRL)  in auart_console_get_options()
1098 	quot |= ((readl(port->membase + AUART_LINECTRL)  in auart_console_get_options()
1336 	version = readl(s->port.membase + AUART_VERSION);  in mxs_auart_probe()