289 static void max310x_port_write(struct uart_port *port, u8 reg, u8 val)  in max310x_port_write()  function
509 	max310x_port_write(port, MAX310X_BRGDIVMSB_REG, (div / 16) >> 8);  in max310x_set_baud()
510 	max310x_port_write(port, MAX310X_BRGDIVLSB_REG, div / 16);  in max310x_set_baud()
511 	max310x_port_write(port, MAX310X_BRGCFG_REG, (div % 16) | mode);  in max310x_set_baud()
656 		max310x_port_write(port, MAX310X_THR_REG, port->x_char);  in max310x_handle_tx()
676 			max310x_port_write(port, MAX310X_THR_REG,  in max310x_handle_tx()
834 	max310x_port_write(port, MAX310X_LCR_REG, lcr);  in max310x_set_termios()
855 	max310x_port_write(port, MAX310X_XON1_REG, termios->c_cc[VSTART]);  in max310x_set_termios()
856 	max310x_port_write(port, MAX310X_XOFF1_REG, termios->c_cc[VSTOP]);  in max310x_set_termios()
866 	max310x_port_write(port, MAX310X_FLOWCTRL_REG, flow);  in max310x_set_termios()
891 	max310x_port_write(port, MAX310X_HDPIXDELAY_REG, val);  in max310x_rs485_config()
926 	max310x_port_write(port, MAX310X_MODE2_REG, val);  in max310x_startup()
932 	max310x_port_write(port, MAX310X_FLOWLVL_REG,  in max310x_startup()
940 	max310x_port_write(port, MAX310X_IRQEN_REG, val | MAX310X_IRQ_CTS_BIT);  in max310x_startup()
950 	max310x_port_write(port, MAX310X_IRQEN_REG, 0);  in max310x_shutdown()
1208 		max310x_port_write(&s->p[i].port, MAX310X_IRQEN_REG, 0);  in max310x_probe()