65 	u8 isr_fcr = 0;  in cls_set_cts_flow_control()  local
73 	isr_fcr = readb(&ch->ch_cls_uart->isr_fcr);  in cls_set_cts_flow_control()
76 	isr_fcr |= (UART_EXAR654_EFR_ECB | UART_EXAR654_EFR_CTSDSR);  in cls_set_cts_flow_control()
77 	isr_fcr &= ~(UART_EXAR654_EFR_IXON);  in cls_set_cts_flow_control()
79 	writeb(isr_fcr, &ch->ch_cls_uart->isr_fcr);  in cls_set_cts_flow_control()
93 	writeb((UART_FCR_ENABLE_FIFO), &ch->ch_cls_uart->isr_fcr);  in cls_set_cts_flow_control()
97 		&ch->ch_cls_uart->isr_fcr);  in cls_set_cts_flow_control()
106 	u8 isr_fcr = 0;  in cls_set_ixon_flow_control()  local
114 	isr_fcr = readb(&ch->ch_cls_uart->isr_fcr);  in cls_set_ixon_flow_control()
117 	isr_fcr |= (UART_EXAR654_EFR_ECB | UART_EXAR654_EFR_IXON);  in cls_set_ixon_flow_control()
118 	isr_fcr &= ~(UART_EXAR654_EFR_CTSDSR);  in cls_set_ixon_flow_control()
120 	writeb(isr_fcr, &ch->ch_cls_uart->isr_fcr);  in cls_set_ixon_flow_control()
140 	writeb((UART_FCR_ENABLE_FIFO), &ch->ch_cls_uart->isr_fcr);  in cls_set_ixon_flow_control()
144 		&ch->ch_cls_uart->isr_fcr);  in cls_set_ixon_flow_control()
151 	u8 isr_fcr = 0;  in cls_set_no_output_flow_control()  local
159 	isr_fcr = readb(&ch->ch_cls_uart->isr_fcr);  in cls_set_no_output_flow_control()
162 	isr_fcr |= (UART_EXAR654_EFR_ECB);  in cls_set_no_output_flow_control()
163 	isr_fcr &= ~(UART_EXAR654_EFR_CTSDSR | UART_EXAR654_EFR_IXON);  in cls_set_no_output_flow_control()
165 	writeb(isr_fcr, &ch->ch_cls_uart->isr_fcr);  in cls_set_no_output_flow_control()
179 	writeb((UART_FCR_ENABLE_FIFO), &ch->ch_cls_uart->isr_fcr);  in cls_set_no_output_flow_control()
183 		&ch->ch_cls_uart->isr_fcr);  in cls_set_no_output_flow_control()
194 	u8 isr_fcr = 0;  in cls_set_rts_flow_control()  local
202 	isr_fcr = readb(&ch->ch_cls_uart->isr_fcr);  in cls_set_rts_flow_control()
205 	isr_fcr |= (UART_EXAR654_EFR_ECB | UART_EXAR654_EFR_RTSDTR);  in cls_set_rts_flow_control()
206 	isr_fcr &= ~(UART_EXAR654_EFR_IXOFF);  in cls_set_rts_flow_control()
208 	writeb(isr_fcr, &ch->ch_cls_uart->isr_fcr);  in cls_set_rts_flow_control()
218 	writeb((UART_FCR_ENABLE_FIFO), &ch->ch_cls_uart->isr_fcr);  in cls_set_rts_flow_control()
222 		&ch->ch_cls_uart->isr_fcr);  in cls_set_rts_flow_control()
232 	u8 isr_fcr = 0;  in cls_set_ixoff_flow_control()  local
240 	isr_fcr = readb(&ch->ch_cls_uart->isr_fcr);  in cls_set_ixoff_flow_control()
243 	isr_fcr |= (UART_EXAR654_EFR_ECB | UART_EXAR654_EFR_IXOFF);  in cls_set_ixoff_flow_control()
244 	isr_fcr &= ~(UART_EXAR654_EFR_RTSDTR);  in cls_set_ixoff_flow_control()
246 	writeb(isr_fcr, &ch->ch_cls_uart->isr_fcr);  in cls_set_ixoff_flow_control()
262 	writeb((UART_FCR_ENABLE_FIFO), &ch->ch_cls_uart->isr_fcr);  in cls_set_ixoff_flow_control()
266 		&ch->ch_cls_uart->isr_fcr);  in cls_set_ixoff_flow_control()
273 	u8 isr_fcr = 0;  in cls_set_no_input_flow_control()  local
281 	isr_fcr = readb(&ch->ch_cls_uart->isr_fcr);  in cls_set_no_input_flow_control()
284 	isr_fcr |= (UART_EXAR654_EFR_ECB);  in cls_set_no_input_flow_control()
285 	isr_fcr &= ~(UART_EXAR654_EFR_RTSDTR | UART_EXAR654_EFR_IXOFF);  in cls_set_no_input_flow_control()
287 	writeb(isr_fcr, &ch->ch_cls_uart->isr_fcr);  in cls_set_no_input_flow_control()
297 	writeb((UART_FCR_ENABLE_FIFO), &ch->ch_cls_uart->isr_fcr);  in cls_set_no_input_flow_control()
301 		&ch->ch_cls_uart->isr_fcr);  in cls_set_no_input_flow_control()
582 		isr = readb(&ch->ch_cls_uart->isr_fcr);  in cls_parse_isr()
625 						&ch->ch_cls_uart->isr_fcr);  in cls_flush_uart_write()
629 		tmp = readb(&ch->ch_cls_uart->isr_fcr);  in cls_flush_uart_write()
871 	unsigned char isr_fcr = 0;  in cls_uart_init()  local
881 	isr_fcr = readb(&ch->ch_cls_uart->isr_fcr);  in cls_uart_init()
884 	isr_fcr |= (UART_EXAR654_EFR_ECB);  in cls_uart_init()
886 	writeb(isr_fcr, &ch->ch_cls_uart->isr_fcr);  in cls_uart_init()
895 						 &ch->ch_cls_uart->isr_fcr);  in cls_uart_init()