Lines Matching refs:sport
269 static inline unsigned uts_reg(struct imx_port *sport) in uts_reg() argument
271 return sport->devdata->uts_reg; in uts_reg()
274 static inline int is_imx1_uart(struct imx_port *sport) in is_imx1_uart() argument
276 return sport->devdata->devtype == IMX1_UART; in is_imx1_uart()
279 static inline int is_imx21_uart(struct imx_port *sport) in is_imx21_uart() argument
281 return sport->devdata->devtype == IMX21_UART; in is_imx21_uart()
284 static inline int is_imx6q_uart(struct imx_port *sport) in is_imx6q_uart() argument
286 return sport->devdata->devtype == IMX6Q_UART; in is_imx6q_uart()
314 static void imx_mctrl_check(struct imx_port *sport) in imx_mctrl_check() argument
318 status = sport->port.ops->get_mctrl(&sport->port); in imx_mctrl_check()
319 changed = status ^ sport->old_status; in imx_mctrl_check()
324 sport->old_status = status; in imx_mctrl_check()
327 sport->port.icount.rng++; in imx_mctrl_check()
329 sport->port.icount.dsr++; in imx_mctrl_check()
331 uart_handle_dcd_change(&sport->port, status & TIOCM_CAR); in imx_mctrl_check()
333 uart_handle_cts_change(&sport->port, status & TIOCM_CTS); in imx_mctrl_check()
335 wake_up_interruptible(&sport->port.state->port.delta_msr_wait); in imx_mctrl_check()
344 struct imx_port *sport = (struct imx_port *)data; in imx_timeout() local
347 if (sport->port.state) { in imx_timeout()
348 spin_lock_irqsave(&sport->port.lock, flags); in imx_timeout()
349 imx_mctrl_check(sport); in imx_timeout()
350 spin_unlock_irqrestore(&sport->port.lock, flags); in imx_timeout()
352 mod_timer(&sport->timer, jiffies + MCTRL_TIMEOUT); in imx_timeout()
361 struct imx_port *sport = (struct imx_port *)port; in imx_stop_tx() local
368 if (sport->dma_is_enabled && sport->dma_is_txing) in imx_stop_tx()
395 struct imx_port *sport = (struct imx_port *)port; in imx_stop_rx() local
398 if (sport->dma_is_enabled && sport->dma_is_rxing) { in imx_stop_rx()
399 if (sport->port.suspended) { in imx_stop_rx()
400 dmaengine_terminate_all(sport->dma_chan_rx); in imx_stop_rx()
401 sport->dma_is_rxing = 0; in imx_stop_rx()
407 temp = readl(sport->port.membase + UCR2); in imx_stop_rx()
408 writel(temp & ~UCR2_RXEN, sport->port.membase + UCR2); in imx_stop_rx()
411 temp = readl(sport->port.membase + UCR1); in imx_stop_rx()
412 writel(temp & ~UCR1_RRDYEN, sport->port.membase + UCR1); in imx_stop_rx()
420 struct imx_port *sport = (struct imx_port *)port; in imx_enable_ms() local
422 mod_timer(&sport->timer, jiffies); in imx_enable_ms()
425 static void imx_dma_tx(struct imx_port *sport);
426 static inline void imx_transmit_buffer(struct imx_port *sport) in imx_transmit_buffer() argument
428 struct circ_buf *xmit = &sport->port.state->xmit; in imx_transmit_buffer()
431 if (sport->port.x_char) { in imx_transmit_buffer()
433 writel(sport->port.x_char, sport->port.membase + URTX0); in imx_transmit_buffer()
434 sport->port.icount.tx++; in imx_transmit_buffer()
435 sport->port.x_char = 0; in imx_transmit_buffer()
439 if (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port)) { in imx_transmit_buffer()
440 imx_stop_tx(&sport->port); in imx_transmit_buffer()
444 if (sport->dma_is_enabled) { in imx_transmit_buffer()
449 temp = readl(sport->port.membase + UCR1); in imx_transmit_buffer()
451 if (sport->dma_is_txing) { in imx_transmit_buffer()
453 writel(temp, sport->port.membase + UCR1); in imx_transmit_buffer()
455 writel(temp, sport->port.membase + UCR1); in imx_transmit_buffer()
456 imx_dma_tx(sport); in imx_transmit_buffer()
461 !(readl(sport->port.membase + uts_reg(sport)) & UTS_TXFULL)) { in imx_transmit_buffer()
464 writel(xmit->buf[xmit->tail], sport->port.membase + URTX0); in imx_transmit_buffer()
466 sport->port.icount.tx++; in imx_transmit_buffer()
470 uart_write_wakeup(&sport->port); in imx_transmit_buffer()
473 imx_stop_tx(&sport->port); in imx_transmit_buffer()
478 struct imx_port *sport = data; in dma_tx_callback() local
479 struct scatterlist *sgl = &sport->tx_sgl[0]; in dma_tx_callback()
480 struct circ_buf *xmit = &sport->port.state->xmit; in dma_tx_callback()
484 spin_lock_irqsave(&sport->port.lock, flags); in dma_tx_callback()
486 dma_unmap_sg(sport->port.dev, sgl, sport->dma_tx_nents, DMA_TO_DEVICE); in dma_tx_callback()
488 temp = readl(sport->port.membase + UCR1); in dma_tx_callback()
490 writel(temp, sport->port.membase + UCR1); in dma_tx_callback()
493 xmit->tail = (xmit->tail + sport->tx_bytes) & (UART_XMIT_SIZE - 1); in dma_tx_callback()
494 sport->port.icount.tx += sport->tx_bytes; in dma_tx_callback()
496 dev_dbg(sport->port.dev, "we finish the TX DMA.\n"); in dma_tx_callback()
498 sport->dma_is_txing = 0; in dma_tx_callback()
500 spin_unlock_irqrestore(&sport->port.lock, flags); in dma_tx_callback()
503 uart_write_wakeup(&sport->port); in dma_tx_callback()
505 if (waitqueue_active(&sport->dma_wait)) { in dma_tx_callback()
506 wake_up(&sport->dma_wait); in dma_tx_callback()
507 dev_dbg(sport->port.dev, "exit in %s.\n", __func__); in dma_tx_callback()
511 spin_lock_irqsave(&sport->port.lock, flags); in dma_tx_callback()
512 if (!uart_circ_empty(xmit) && !uart_tx_stopped(&sport->port)) in dma_tx_callback()
513 imx_dma_tx(sport); in dma_tx_callback()
514 spin_unlock_irqrestore(&sport->port.lock, flags); in dma_tx_callback()
517 static void imx_dma_tx(struct imx_port *sport) in imx_dma_tx() argument
519 struct circ_buf *xmit = &sport->port.state->xmit; in imx_dma_tx()
520 struct scatterlist *sgl = sport->tx_sgl; in imx_dma_tx()
522 struct dma_chan *chan = sport->dma_chan_tx; in imx_dma_tx()
523 struct device *dev = sport->port.dev; in imx_dma_tx()
527 if (sport->dma_is_txing) in imx_dma_tx()
530 sport->tx_bytes = uart_circ_chars_pending(xmit); in imx_dma_tx()
533 sport->dma_tx_nents = 1; in imx_dma_tx()
534 sg_init_one(sgl, xmit->buf + xmit->tail, sport->tx_bytes); in imx_dma_tx()
536 sport->dma_tx_nents = 2; in imx_dma_tx()
543 ret = dma_map_sg(dev, sgl, sport->dma_tx_nents, DMA_TO_DEVICE); in imx_dma_tx()
548 desc = dmaengine_prep_slave_sg(chan, sgl, sport->dma_tx_nents, in imx_dma_tx()
551 dma_unmap_sg(dev, sgl, sport->dma_tx_nents, in imx_dma_tx()
557 desc->callback_param = sport; in imx_dma_tx()
562 temp = readl(sport->port.membase + UCR1); in imx_dma_tx()
564 writel(temp, sport->port.membase + UCR1); in imx_dma_tx()
567 sport->dma_is_txing = 1; in imx_dma_tx()
578 struct imx_port *sport = (struct imx_port *)port; in imx_start_tx() local
595 if (!sport->dma_is_enabled) { in imx_start_tx()
596 temp = readl(sport->port.membase + UCR1); in imx_start_tx()
597 writel(temp | UCR1_TXMPTYEN, sport->port.membase + UCR1); in imx_start_tx()
600 if (sport->dma_is_enabled) { in imx_start_tx()
601 if (sport->port.x_char) { in imx_start_tx()
604 temp = readl(sport->port.membase + UCR1); in imx_start_tx()
607 writel(temp, sport->port.membase + UCR1); in imx_start_tx()
613 imx_dma_tx(sport); in imx_start_tx()
620 struct imx_port *sport = dev_id; in imx_rtsint() local
624 spin_lock_irqsave(&sport->port.lock, flags); in imx_rtsint()
626 writel(USR1_RTSD, sport->port.membase + USR1); in imx_rtsint()
627 val = readl(sport->port.membase + USR1) & USR1_RTSS; in imx_rtsint()
628 uart_handle_cts_change(&sport->port, !!val); in imx_rtsint()
629 wake_up_interruptible(&sport->port.state->port.delta_msr_wait); in imx_rtsint()
631 spin_unlock_irqrestore(&sport->port.lock, flags); in imx_rtsint()
637 struct imx_port *sport = dev_id; in imx_txint() local
640 spin_lock_irqsave(&sport->port.lock, flags); in imx_txint()
641 imx_transmit_buffer(sport); in imx_txint()
642 spin_unlock_irqrestore(&sport->port.lock, flags); in imx_txint()
648 struct imx_port *sport = dev_id; in imx_rxint() local
650 struct tty_port *port = &sport->port.state->port; in imx_rxint()
653 spin_lock_irqsave(&sport->port.lock, flags); in imx_rxint()
655 while (readl(sport->port.membase + USR2) & USR2_RDR) { in imx_rxint()
657 sport->port.icount.rx++; in imx_rxint()
659 rx = readl(sport->port.membase + URXD0); in imx_rxint()
661 temp = readl(sport->port.membase + USR2); in imx_rxint()
663 writel(USR2_BRCD, sport->port.membase + USR2); in imx_rxint()
664 if (uart_handle_break(&sport->port)) in imx_rxint()
668 if (uart_handle_sysrq_char(&sport->port, (unsigned char)rx)) in imx_rxint()
673 sport->port.icount.brk++; in imx_rxint()
675 sport->port.icount.parity++; in imx_rxint()
677 sport->port.icount.frame++; in imx_rxint()
679 sport->port.icount.overrun++; in imx_rxint()
681 if (rx & sport->port.ignore_status_mask) { in imx_rxint()
687 rx &= (sport->port.read_status_mask | 0xFF); in imx_rxint()
699 sport->port.sysrq = 0; in imx_rxint()
703 if (sport->port.ignore_status_mask & URXD_DUMMY_READ) in imx_rxint()
707 sport->port.icount.buf_overrun++; in imx_rxint()
711 spin_unlock_irqrestore(&sport->port.lock, flags); in imx_rxint()
716 static int start_rx_dma(struct imx_port *sport);
721 static void imx_dma_rxint(struct imx_port *sport) in imx_dma_rxint() argument
726 spin_lock_irqsave(&sport->port.lock, flags); in imx_dma_rxint()
728 temp = readl(sport->port.membase + USR2); in imx_dma_rxint()
729 if ((temp & USR2_RDR) && !sport->dma_is_rxing) { in imx_dma_rxint()
730 sport->dma_is_rxing = 1; in imx_dma_rxint()
733 temp = readl(sport->port.membase + UCR1); in imx_dma_rxint()
735 writel(temp, sport->port.membase + UCR1); in imx_dma_rxint()
737 temp = readl(sport->port.membase + UCR2); in imx_dma_rxint()
739 writel(temp, sport->port.membase + UCR2); in imx_dma_rxint()
742 start_rx_dma(sport); in imx_dma_rxint()
745 spin_unlock_irqrestore(&sport->port.lock, flags); in imx_dma_rxint()
750 struct imx_port *sport = dev_id; in imx_int() local
754 sts = readl(sport->port.membase + USR1); in imx_int()
755 sts2 = readl(sport->port.membase + USR2); in imx_int()
758 if (sport->dma_is_enabled) in imx_int()
759 imx_dma_rxint(sport); in imx_int()
765 readl(sport->port.membase + UCR1) & UCR1_TXMPTYEN) || in imx_int()
767 readl(sport->port.membase + UCR4) & UCR4_TCEN)) in imx_int()
774 writel(USR1_AWAKE, sport->port.membase + USR1); in imx_int()
777 sport->port.icount.overrun++; in imx_int()
778 writel(USR2_ORE, sport->port.membase + USR2); in imx_int()
789 struct imx_port *sport = (struct imx_port *)port; in imx_tx_empty() local
792 ret = (readl(sport->port.membase + USR2) & USR2_TXDC) ? TIOCSER_TEMT : 0; in imx_tx_empty()
795 if (sport->dma_is_enabled && sport->dma_is_txing) in imx_tx_empty()
806 struct imx_port *sport = (struct imx_port *)port; in imx_get_mctrl() local
809 if (readl(sport->port.membase + USR1) & USR1_RTSS) in imx_get_mctrl()
812 if (readl(sport->port.membase + UCR2) & UCR2_CTS) in imx_get_mctrl()
815 if (readl(sport->port.membase + uts_reg(sport)) & UTS_LOOP) in imx_get_mctrl()
823 struct imx_port *sport = (struct imx_port *)port; in imx_set_mctrl() local
827 temp = readl(sport->port.membase + UCR2); in imx_set_mctrl()
831 writel(temp, sport->port.membase + UCR2); in imx_set_mctrl()
834 temp = readl(sport->port.membase + uts_reg(sport)) & ~UTS_LOOP; in imx_set_mctrl()
837 writel(temp, sport->port.membase + uts_reg(sport)); in imx_set_mctrl()
845 struct imx_port *sport = (struct imx_port *)port; in imx_break_ctl() local
848 spin_lock_irqsave(&sport->port.lock, flags); in imx_break_ctl()
850 temp = readl(sport->port.membase + UCR1) & ~UCR1_SNDBRK; in imx_break_ctl()
855 writel(temp, sport->port.membase + UCR1); in imx_break_ctl()
857 spin_unlock_irqrestore(&sport->port.lock, flags); in imx_break_ctl()
861 static void imx_rx_dma_done(struct imx_port *sport) in imx_rx_dma_done() argument
866 spin_lock_irqsave(&sport->port.lock, flags); in imx_rx_dma_done()
869 temp = readl(sport->port.membase + UCR1); in imx_rx_dma_done()
871 writel(temp, sport->port.membase + UCR1); in imx_rx_dma_done()
873 temp = readl(sport->port.membase + UCR2); in imx_rx_dma_done()
875 writel(temp, sport->port.membase + UCR2); in imx_rx_dma_done()
877 sport->dma_is_rxing = 0; in imx_rx_dma_done()
880 if (waitqueue_active(&sport->dma_wait)) in imx_rx_dma_done()
881 wake_up(&sport->dma_wait); in imx_rx_dma_done()
883 spin_unlock_irqrestore(&sport->port.lock, flags); in imx_rx_dma_done()
896 struct imx_port *sport = data; in dma_rx_callback() local
897 struct dma_chan *chan = sport->dma_chan_rx; in dma_rx_callback()
898 struct scatterlist *sgl = &sport->rx_sgl; in dma_rx_callback()
899 struct tty_port *port = &sport->port.state->port; in dma_rx_callback()
905 dma_unmap_sg(sport->port.dev, sgl, 1, DMA_FROM_DEVICE); in dma_rx_callback()
910 dev_dbg(sport->port.dev, "We get %d bytes.\n", count); in dma_rx_callback()
913 if (!(sport->port.ignore_status_mask & URXD_DUMMY_READ)) { in dma_rx_callback()
914 int bytes = tty_insert_flip_string(port, sport->rx_buf, in dma_rx_callback()
918 sport->port.icount.buf_overrun++; in dma_rx_callback()
921 sport->port.icount.rx += count; in dma_rx_callback()
932 if (readl(sport->port.membase + USR2) & USR2_RDR) in dma_rx_callback()
933 start_rx_dma(sport); in dma_rx_callback()
935 imx_rx_dma_done(sport); in dma_rx_callback()
938 static int start_rx_dma(struct imx_port *sport) in start_rx_dma() argument
940 struct scatterlist *sgl = &sport->rx_sgl; in start_rx_dma()
941 struct dma_chan *chan = sport->dma_chan_rx; in start_rx_dma()
942 struct device *dev = sport->port.dev; in start_rx_dma()
946 sg_init_one(sgl, sport->rx_buf, RX_BUF_SIZE); in start_rx_dma()
960 desc->callback_param = sport; in start_rx_dma()
973 static void imx_setup_ufcr(struct imx_port *sport, in imx_setup_ufcr() argument
979 val = readl(sport->port.membase + UFCR) & (UFCR_RFDIV | UFCR_DCEDTE); in imx_setup_ufcr()
981 writel(val, sport->port.membase + UFCR); in imx_setup_ufcr()
984 static void imx_uart_dma_exit(struct imx_port *sport) in imx_uart_dma_exit() argument
986 if (sport->dma_chan_rx) { in imx_uart_dma_exit()
987 dma_release_channel(sport->dma_chan_rx); in imx_uart_dma_exit()
988 sport->dma_chan_rx = NULL; in imx_uart_dma_exit()
990 kfree(sport->rx_buf); in imx_uart_dma_exit()
991 sport->rx_buf = NULL; in imx_uart_dma_exit()
994 if (sport->dma_chan_tx) { in imx_uart_dma_exit()
995 dma_release_channel(sport->dma_chan_tx); in imx_uart_dma_exit()
996 sport->dma_chan_tx = NULL; in imx_uart_dma_exit()
999 sport->dma_is_inited = 0; in imx_uart_dma_exit()
1002 static int imx_uart_dma_init(struct imx_port *sport) in imx_uart_dma_init() argument
1005 struct device *dev = sport->port.dev; in imx_uart_dma_init()
1009 sport->dma_chan_rx = dma_request_slave_channel(dev, "rx"); in imx_uart_dma_init()
1010 if (!sport->dma_chan_rx) { in imx_uart_dma_init()
1017 slave_config.src_addr = sport->port.mapbase + URXD0; in imx_uart_dma_init()
1021 ret = dmaengine_slave_config(sport->dma_chan_rx, &slave_config); in imx_uart_dma_init()
1027 sport->rx_buf = kzalloc(PAGE_SIZE, GFP_KERNEL); in imx_uart_dma_init()
1028 if (!sport->rx_buf) { in imx_uart_dma_init()
1034 sport->dma_chan_tx = dma_request_slave_channel(dev, "tx"); in imx_uart_dma_init()
1035 if (!sport->dma_chan_tx) { in imx_uart_dma_init()
1042 slave_config.dst_addr = sport->port.mapbase + URTX0; in imx_uart_dma_init()
1045 ret = dmaengine_slave_config(sport->dma_chan_tx, &slave_config); in imx_uart_dma_init()
1051 sport->dma_is_inited = 1; in imx_uart_dma_init()
1055 imx_uart_dma_exit(sport); in imx_uart_dma_init()
1059 static void imx_enable_dma(struct imx_port *sport) in imx_enable_dma() argument
1063 init_waitqueue_head(&sport->dma_wait); in imx_enable_dma()
1066 temp = readl(sport->port.membase + UCR1); in imx_enable_dma()
1068 writel(temp, sport->port.membase + UCR1); in imx_enable_dma()
1070 temp = readl(sport->port.membase + UCR2); in imx_enable_dma()
1072 writel(temp, sport->port.membase + UCR2); in imx_enable_dma()
1074 imx_setup_ufcr(sport, TXTL_DMA, RXTL_DMA); in imx_enable_dma()
1076 sport->dma_is_enabled = 1; in imx_enable_dma()
1079 static void imx_disable_dma(struct imx_port *sport) in imx_disable_dma() argument
1084 temp = readl(sport->port.membase + UCR1); in imx_disable_dma()
1086 writel(temp, sport->port.membase + UCR1); in imx_disable_dma()
1089 temp = readl(sport->port.membase + UCR2); in imx_disable_dma()
1091 writel(temp, sport->port.membase + UCR2); in imx_disable_dma()
1093 imx_setup_ufcr(sport, TXTL_DEFAULT, RXTL_DEFAULT); in imx_disable_dma()
1095 sport->dma_is_enabled = 0; in imx_disable_dma()
1103 struct imx_port *sport = (struct imx_port *)port; in imx_startup() local
1107 retval = clk_prepare_enable(sport->clk_per); in imx_startup()
1110 retval = clk_prepare_enable(sport->clk_ipg); in imx_startup()
1112 clk_disable_unprepare(sport->clk_per); in imx_startup()
1116 imx_setup_ufcr(sport, TXTL_DEFAULT, RXTL_DEFAULT); in imx_startup()
1121 temp = readl(sport->port.membase + UCR4); in imx_startup()
1127 writel(temp & ~UCR4_DREN, sport->port.membase + UCR4); in imx_startup()
1130 if (is_imx6q_uart(sport) && !uart_console(port) && in imx_startup()
1131 !sport->dma_is_inited) in imx_startup()
1132 imx_uart_dma_init(sport); in imx_startup()
1134 spin_lock_irqsave(&sport->port.lock, flags); in imx_startup()
1138 temp = readl(sport->port.membase + UCR2); in imx_startup()
1140 writel(temp, sport->port.membase + UCR2); in imx_startup()
1142 while (!(readl(sport->port.membase + UCR2) & UCR2_SRST) && (--i > 0)) in imx_startup()
1148 writel(USR1_RTSD, sport->port.membase + USR1); in imx_startup()
1149 writel(USR2_ORE, sport->port.membase + USR2); in imx_startup()
1151 if (sport->dma_is_inited && !sport->dma_is_enabled) in imx_startup()
1152 imx_enable_dma(sport); in imx_startup()
1154 temp = readl(sport->port.membase + UCR1); in imx_startup()
1157 writel(temp, sport->port.membase + UCR1); in imx_startup()
1159 temp = readl(sport->port.membase + UCR4); in imx_startup()
1161 writel(temp, sport->port.membase + UCR4); in imx_startup()
1163 temp = readl(sport->port.membase + UCR2); in imx_startup()
1165 if (!sport->have_rtscts) in imx_startup()
1167 writel(temp, sport->port.membase + UCR2); in imx_startup()
1169 if (!is_imx1_uart(sport)) { in imx_startup()
1170 temp = readl(sport->port.membase + UCR3); in imx_startup()
1172 writel(temp, sport->port.membase + UCR3); in imx_startup()
1178 imx_enable_ms(&sport->port); in imx_startup()
1179 spin_unlock_irqrestore(&sport->port.lock, flags); in imx_startup()
1186 struct imx_port *sport = (struct imx_port *)port; in imx_shutdown() local
1190 if (sport->dma_is_enabled) { in imx_shutdown()
1194 ret = wait_event_interruptible(sport->dma_wait, in imx_shutdown()
1195 !sport->dma_is_rxing && !sport->dma_is_txing); in imx_shutdown()
1197 sport->dma_is_rxing = 0; in imx_shutdown()
1198 sport->dma_is_txing = 0; in imx_shutdown()
1199 dmaengine_terminate_all(sport->dma_chan_tx); in imx_shutdown()
1200 dmaengine_terminate_all(sport->dma_chan_rx); in imx_shutdown()
1202 spin_lock_irqsave(&sport->port.lock, flags); in imx_shutdown()
1205 imx_disable_dma(sport); in imx_shutdown()
1206 spin_unlock_irqrestore(&sport->port.lock, flags); in imx_shutdown()
1207 imx_uart_dma_exit(sport); in imx_shutdown()
1210 spin_lock_irqsave(&sport->port.lock, flags); in imx_shutdown()
1211 temp = readl(sport->port.membase + UCR2); in imx_shutdown()
1213 writel(temp, sport->port.membase + UCR2); in imx_shutdown()
1214 spin_unlock_irqrestore(&sport->port.lock, flags); in imx_shutdown()
1219 del_timer_sync(&sport->timer); in imx_shutdown()
1225 spin_lock_irqsave(&sport->port.lock, flags); in imx_shutdown()
1226 temp = readl(sport->port.membase + UCR1); in imx_shutdown()
1229 writel(temp, sport->port.membase + UCR1); in imx_shutdown()
1230 spin_unlock_irqrestore(&sport->port.lock, flags); in imx_shutdown()
1232 clk_disable_unprepare(sport->clk_per); in imx_shutdown()
1233 clk_disable_unprepare(sport->clk_ipg); in imx_shutdown()
1238 struct imx_port *sport = (struct imx_port *)port; in imx_flush_buffer() local
1239 struct scatterlist *sgl = &sport->tx_sgl[0]; in imx_flush_buffer()
1243 if (!sport->dma_chan_tx) in imx_flush_buffer()
1246 sport->tx_bytes = 0; in imx_flush_buffer()
1247 dmaengine_terminate_all(sport->dma_chan_tx); in imx_flush_buffer()
1248 if (sport->dma_is_txing) { in imx_flush_buffer()
1249 dma_unmap_sg(sport->port.dev, sgl, sport->dma_tx_nents, in imx_flush_buffer()
1251 temp = readl(sport->port.membase + UCR1); in imx_flush_buffer()
1253 writel(temp, sport->port.membase + UCR1); in imx_flush_buffer()
1254 sport->dma_is_txing = false; in imx_flush_buffer()
1264 ubir = readl(sport->port.membase + UBIR); in imx_flush_buffer()
1265 ubmr = readl(sport->port.membase + UBMR); in imx_flush_buffer()
1266 uts = readl(sport->port.membase + IMX21_UTS); in imx_flush_buffer()
1268 temp = readl(sport->port.membase + UCR2); in imx_flush_buffer()
1270 writel(temp, sport->port.membase + UCR2); in imx_flush_buffer()
1272 while (!(readl(sport->port.membase + UCR2) & UCR2_SRST) && (--i > 0)) in imx_flush_buffer()
1276 writel(ubir, sport->port.membase + UBIR); in imx_flush_buffer()
1277 writel(ubmr, sport->port.membase + UBMR); in imx_flush_buffer()
1278 writel(uts, sport->port.membase + IMX21_UTS); in imx_flush_buffer()
1285 struct imx_port *sport = (struct imx_port *)port; in imx_set_termios() local
1309 if (sport->have_rtscts) { in imx_set_termios()
1340 del_timer_sync(&sport->timer); in imx_set_termios()
1348 spin_lock_irqsave(&sport->port.lock, flags); in imx_set_termios()
1350 sport->port.read_status_mask = 0; in imx_set_termios()
1352 sport->port.read_status_mask |= (URXD_FRMERR | URXD_PRERR); in imx_set_termios()
1354 sport->port.read_status_mask |= URXD_BRK; in imx_set_termios()
1359 sport->port.ignore_status_mask = 0; in imx_set_termios()
1361 sport->port.ignore_status_mask |= URXD_PRERR | URXD_FRMERR; in imx_set_termios()
1363 sport->port.ignore_status_mask |= URXD_BRK; in imx_set_termios()
1369 sport->port.ignore_status_mask |= URXD_OVRRUN; in imx_set_termios()
1373 sport->port.ignore_status_mask |= URXD_DUMMY_READ; in imx_set_termios()
1383 old_ucr1 = readl(sport->port.membase + UCR1); in imx_set_termios()
1385 sport->port.membase + UCR1); in imx_set_termios()
1387 while (!(readl(sport->port.membase + USR2) & USR2_TXDC)) in imx_set_termios()
1391 old_ucr2 = readl(sport->port.membase + UCR2); in imx_set_termios()
1393 sport->port.membase + UCR2); in imx_set_termios()
1397 div = sport->port.uartclk / (baud * 16); in imx_set_termios()
1399 baud = sport->port.uartclk / (quot * 16); in imx_set_termios()
1401 div = sport->port.uartclk / (baud * 16); in imx_set_termios()
1407 rational_best_approximation(16 * div * baud, sport->port.uartclk, in imx_set_termios()
1410 tdiv64 = sport->port.uartclk; in imx_set_termios()
1419 ufcr = readl(sport->port.membase + UFCR); in imx_set_termios()
1421 if (sport->dte_mode) in imx_set_termios()
1423 writel(ufcr, sport->port.membase + UFCR); in imx_set_termios()
1425 writel(num, sport->port.membase + UBIR); in imx_set_termios()
1426 writel(denom, sport->port.membase + UBMR); in imx_set_termios()
1428 if (!is_imx1_uart(sport)) in imx_set_termios()
1429 writel(sport->port.uartclk / div / 1000, in imx_set_termios()
1430 sport->port.membase + IMX21_ONEMS); in imx_set_termios()
1432 writel(old_ucr1, sport->port.membase + UCR1); in imx_set_termios()
1435 writel(ucr2 | old_ucr2, sport->port.membase + UCR2); in imx_set_termios()
1437 if (UART_ENABLE_MS(&sport->port, termios->c_cflag)) in imx_set_termios()
1438 imx_enable_ms(&sport->port); in imx_set_termios()
1440 spin_unlock_irqrestore(&sport->port.lock, flags); in imx_set_termios()
1445 struct imx_port *sport = (struct imx_port *)port; in imx_type() local
1447 return sport->port.type == PORT_IMX ? "IMX" : NULL; in imx_type()
1455 struct imx_port *sport = (struct imx_port *)port; in imx_config_port() local
1458 sport->port.type = PORT_IMX; in imx_config_port()
1469 struct imx_port *sport = (struct imx_port *)port; in imx_verify_port() local
1474 if (sport->port.irq != ser->irq) in imx_verify_port()
1478 if (sport->port.uartclk / 16 != ser->baud_base) in imx_verify_port()
1480 if (sport->port.mapbase != (unsigned long)ser->iomem_base) in imx_verify_port()
1482 if (sport->port.iobase != ser->port) in imx_verify_port()
1493 struct imx_port *sport = (struct imx_port *)port; in imx_poll_init() local
1498 retval = clk_prepare_enable(sport->clk_ipg); in imx_poll_init()
1501 retval = clk_prepare_enable(sport->clk_per); in imx_poll_init()
1503 clk_disable_unprepare(sport->clk_ipg); in imx_poll_init()
1505 imx_setup_ufcr(sport, TXTL_DEFAULT, RXTL_DEFAULT); in imx_poll_init()
1507 spin_lock_irqsave(&sport->port.lock, flags); in imx_poll_init()
1509 temp = readl(sport->port.membase + UCR1); in imx_poll_init()
1510 if (is_imx1_uart(sport)) in imx_poll_init()
1514 writel(temp, sport->port.membase + UCR1); in imx_poll_init()
1516 temp = readl(sport->port.membase + UCR2); in imx_poll_init()
1518 writel(temp, sport->port.membase + UCR2); in imx_poll_init()
1520 spin_unlock_irqrestore(&sport->port.lock, flags); in imx_poll_init()
1555 struct imx_port *sport = (struct imx_port *)port; in imx_rs485_config() local
1563 if (!sport->have_rtscts) in imx_rs485_config()
1570 temp = readl(sport->port.membase + UCR2); in imx_rs485_config()
1576 writel(temp, sport->port.membase + UCR2); in imx_rs485_config()
1612 struct imx_port *sport = (struct imx_port *)port; in imx_console_putchar() local
1614 while (readl(sport->port.membase + uts_reg(sport)) & UTS_TXFULL) in imx_console_putchar()
1617 writel(ch, sport->port.membase + URTX0); in imx_console_putchar()
1626 struct imx_port *sport = imx_ports[co->index]; in imx_console_write() local
1633 retval = clk_enable(sport->clk_per); in imx_console_write()
1636 retval = clk_enable(sport->clk_ipg); in imx_console_write()
1638 clk_disable(sport->clk_per); in imx_console_write()
1642 if (sport->port.sysrq) in imx_console_write()
1645 locked = spin_trylock_irqsave(&sport->port.lock, flags); in imx_console_write()
1647 spin_lock_irqsave(&sport->port.lock, flags); in imx_console_write()
1652 imx_port_ucrs_save(&sport->port, &old_ucr); in imx_console_write()
1655 if (is_imx1_uart(sport)) in imx_console_write()
1660 writel(ucr1, sport->port.membase + UCR1); in imx_console_write()
1662 writel(old_ucr.ucr2 | UCR2_TXEN, sport->port.membase + UCR2); in imx_console_write()
1664 uart_console_write(&sport->port, s, count, imx_console_putchar); in imx_console_write()
1670 while (!(readl(sport->port.membase + USR2) & USR2_TXDC)); in imx_console_write()
1672 imx_port_ucrs_restore(&sport->port, &old_ucr); in imx_console_write()
1675 spin_unlock_irqrestore(&sport->port.lock, flags); in imx_console_write()
1677 clk_disable(sport->clk_ipg); in imx_console_write()
1678 clk_disable(sport->clk_per); in imx_console_write()
1686 imx_console_get_options(struct imx_port *sport, int *baud, in imx_console_get_options() argument
1690 if (readl(sport->port.membase + UCR1) & UCR1_UARTEN) { in imx_console_get_options()
1696 ucr2 = readl(sport->port.membase + UCR2); in imx_console_get_options()
1711 ubir = readl(sport->port.membase + UBIR) & 0xffff; in imx_console_get_options()
1712 ubmr = readl(sport->port.membase + UBMR) & 0xffff; in imx_console_get_options()
1714 ucfr_rfdiv = (readl(sport->port.membase + UFCR) & UFCR_RFDIV) >> 7; in imx_console_get_options()
1720 uartclk = clk_get_rate(sport->clk_per); in imx_console_get_options()
1747 struct imx_port *sport; in imx_console_setup() local
1761 sport = imx_ports[co->index]; in imx_console_setup()
1762 if (sport == NULL) in imx_console_setup()
1766 retval = clk_prepare_enable(sport->clk_ipg); in imx_console_setup()
1773 imx_console_get_options(sport, &baud, &parity, &bits); in imx_console_setup()
1775 imx_setup_ufcr(sport, TXTL_DEFAULT, RXTL_DEFAULT); in imx_console_setup()
1777 retval = uart_set_options(&sport->port, co, baud, parity, bits, flow); in imx_console_setup()
1779 clk_disable(sport->clk_ipg); in imx_console_setup()
1781 clk_unprepare(sport->clk_ipg); in imx_console_setup()
1785 retval = clk_prepare(sport->clk_per); in imx_console_setup()
1787 clk_disable_unprepare(sport->clk_ipg); in imx_console_setup()
1856 static int serial_imx_probe_dt(struct imx_port *sport, in serial_imx_probe_dt() argument
1873 sport->port.line = ret; in serial_imx_probe_dt()
1876 sport->have_rtscts = 1; in serial_imx_probe_dt()
1879 sport->dte_mode = 1; in serial_imx_probe_dt()
1881 sport->devdata = of_id->data; in serial_imx_probe_dt()
1886 static inline int serial_imx_probe_dt(struct imx_port *sport, in serial_imx_probe_dt() argument
1893 static void serial_imx_probe_pdata(struct imx_port *sport, in serial_imx_probe_pdata() argument
1898 sport->port.line = pdev->id; in serial_imx_probe_pdata()
1899 sport->devdata = (struct imx_uart_data *) pdev->id_entry->driver_data; in serial_imx_probe_pdata()
1905 sport->have_rtscts = 1; in serial_imx_probe_pdata()
1910 struct imx_port *sport; in serial_imx_probe() local
1916 sport = devm_kzalloc(&pdev->dev, sizeof(*sport), GFP_KERNEL); in serial_imx_probe()
1917 if (!sport) in serial_imx_probe()
1920 ret = serial_imx_probe_dt(sport, pdev); in serial_imx_probe()
1922 serial_imx_probe_pdata(sport, pdev); in serial_imx_probe()
1935 sport->port.dev = &pdev->dev; in serial_imx_probe()
1936 sport->port.mapbase = res->start; in serial_imx_probe()
1937 sport->port.membase = base; in serial_imx_probe()
1938 sport->port.type = PORT_IMX, in serial_imx_probe()
1939 sport->port.iotype = UPIO_MEM; in serial_imx_probe()
1940 sport->port.irq = rxirq; in serial_imx_probe()
1941 sport->port.fifosize = 32; in serial_imx_probe()
1942 sport->port.ops = &imx_pops; in serial_imx_probe()
1943 sport->port.rs485_config = imx_rs485_config; in serial_imx_probe()
1944 sport->port.rs485.flags = in serial_imx_probe()
1946 sport->port.flags = UPF_BOOT_AUTOCONF; in serial_imx_probe()
1947 init_timer(&sport->timer); in serial_imx_probe()
1948 sport->timer.function = imx_timeout; in serial_imx_probe()
1949 sport->timer.data = (unsigned long)sport; in serial_imx_probe()
1951 sport->clk_ipg = devm_clk_get(&pdev->dev, "ipg"); in serial_imx_probe()
1952 if (IS_ERR(sport->clk_ipg)) { in serial_imx_probe()
1953 ret = PTR_ERR(sport->clk_ipg); in serial_imx_probe()
1958 sport->clk_per = devm_clk_get(&pdev->dev, "per"); in serial_imx_probe()
1959 if (IS_ERR(sport->clk_per)) { in serial_imx_probe()
1960 ret = PTR_ERR(sport->clk_per); in serial_imx_probe()
1965 sport->port.uartclk = clk_get_rate(sport->clk_per); in serial_imx_probe()
1968 ret = clk_prepare_enable(sport->clk_ipg); in serial_imx_probe()
1973 reg = readl_relaxed(sport->port.membase + UCR1); in serial_imx_probe()
1976 writel_relaxed(reg, sport->port.membase + UCR1); in serial_imx_probe()
1978 clk_disable_unprepare(sport->clk_ipg); in serial_imx_probe()
1986 dev_name(&pdev->dev), sport); in serial_imx_probe()
1991 dev_name(&pdev->dev), sport); in serial_imx_probe()
1996 dev_name(&pdev->dev), sport); in serial_imx_probe()
2001 imx_ports[sport->port.line] = sport; in serial_imx_probe()
2003 platform_set_drvdata(pdev, sport); in serial_imx_probe()
2005 return uart_add_one_port(&imx_reg, &sport->port); in serial_imx_probe()
2010 struct imx_port *sport = platform_get_drvdata(pdev); in serial_imx_remove() local
2012 return uart_remove_one_port(&imx_reg, &sport->port); in serial_imx_remove()
2015 static void serial_imx_restore_context(struct imx_port *sport) in serial_imx_restore_context() argument
2017 if (!sport->context_saved) in serial_imx_restore_context()
2020 writel(sport->saved_reg[4], sport->port.membase + UFCR); in serial_imx_restore_context()
2021 writel(sport->saved_reg[5], sport->port.membase + UESC); in serial_imx_restore_context()
2022 writel(sport->saved_reg[6], sport->port.membase + UTIM); in serial_imx_restore_context()
2023 writel(sport->saved_reg[7], sport->port.membase + UBIR); in serial_imx_restore_context()
2024 writel(sport->saved_reg[8], sport->port.membase + UBMR); in serial_imx_restore_context()
2025 writel(sport->saved_reg[9], sport->port.membase + IMX21_UTS); in serial_imx_restore_context()
2026 writel(sport->saved_reg[0], sport->port.membase + UCR1); in serial_imx_restore_context()
2027 writel(sport->saved_reg[1] | UCR2_SRST, sport->port.membase + UCR2); in serial_imx_restore_context()
2028 writel(sport->saved_reg[2], sport->port.membase + UCR3); in serial_imx_restore_context()
2029 writel(sport->saved_reg[3], sport->port.membase + UCR4); in serial_imx_restore_context()
2030 sport->context_saved = false; in serial_imx_restore_context()
2033 static void serial_imx_save_context(struct imx_port *sport) in serial_imx_save_context() argument
2036 sport->saved_reg[0] = readl(sport->port.membase + UCR1); in serial_imx_save_context()
2037 sport->saved_reg[1] = readl(sport->port.membase + UCR2); in serial_imx_save_context()
2038 sport->saved_reg[2] = readl(sport->port.membase + UCR3); in serial_imx_save_context()
2039 sport->saved_reg[3] = readl(sport->port.membase + UCR4); in serial_imx_save_context()
2040 sport->saved_reg[4] = readl(sport->port.membase + UFCR); in serial_imx_save_context()
2041 sport->saved_reg[5] = readl(sport->port.membase + UESC); in serial_imx_save_context()
2042 sport->saved_reg[6] = readl(sport->port.membase + UTIM); in serial_imx_save_context()
2043 sport->saved_reg[7] = readl(sport->port.membase + UBIR); in serial_imx_save_context()
2044 sport->saved_reg[8] = readl(sport->port.membase + UBMR); in serial_imx_save_context()
2045 sport->saved_reg[9] = readl(sport->port.membase + IMX21_UTS); in serial_imx_save_context()
2046 sport->context_saved = true; in serial_imx_save_context()
2049 static void serial_imx_enable_wakeup(struct imx_port *sport, bool on) in serial_imx_enable_wakeup() argument
2053 val = readl(sport->port.membase + UCR3); in serial_imx_enable_wakeup()
2058 writel(val, sport->port.membase + UCR3); in serial_imx_enable_wakeup()
2060 val = readl(sport->port.membase + UCR1); in serial_imx_enable_wakeup()
2065 writel(val, sport->port.membase + UCR1); in serial_imx_enable_wakeup()
2071 struct imx_port *sport = platform_get_drvdata(pdev); in imx_serial_port_suspend_noirq() local
2074 ret = clk_enable(sport->clk_ipg); in imx_serial_port_suspend_noirq()
2078 serial_imx_save_context(sport); in imx_serial_port_suspend_noirq()
2080 clk_disable(sport->clk_ipg); in imx_serial_port_suspend_noirq()
2088 struct imx_port *sport = platform_get_drvdata(pdev); in imx_serial_port_resume_noirq() local
2091 ret = clk_enable(sport->clk_ipg); in imx_serial_port_resume_noirq()
2095 serial_imx_restore_context(sport); in imx_serial_port_resume_noirq()
2097 clk_disable(sport->clk_ipg); in imx_serial_port_resume_noirq()
2105 struct imx_port *sport = platform_get_drvdata(pdev); in imx_serial_port_suspend() local
2108 serial_imx_enable_wakeup(sport, true); in imx_serial_port_suspend()
2110 uart_suspend_port(&imx_reg, &sport->port); in imx_serial_port_suspend()
2118 struct imx_port *sport = platform_get_drvdata(pdev); in imx_serial_port_resume() local
2121 serial_imx_enable_wakeup(sport, false); in imx_serial_port_resume()
2123 uart_resume_port(&imx_reg, &sport->port); in imx_serial_port_resume()