Lines Matching refs:port
197 struct uart_port port; member
292 static void imx_port_ucrs_save(struct uart_port *port, in imx_port_ucrs_save() argument
296 ucr->ucr1 = readl(port->membase + UCR1); in imx_port_ucrs_save()
297 ucr->ucr2 = readl(port->membase + UCR2); in imx_port_ucrs_save()
298 ucr->ucr3 = readl(port->membase + UCR3); in imx_port_ucrs_save()
301 static void imx_port_ucrs_restore(struct uart_port *port, in imx_port_ucrs_restore() argument
305 writel(ucr->ucr1, port->membase + UCR1); in imx_port_ucrs_restore()
306 writel(ucr->ucr2, port->membase + UCR2); in imx_port_ucrs_restore()
307 writel(ucr->ucr3, port->membase + UCR3); in imx_port_ucrs_restore()
318 status = sport->port.ops->get_mctrl(&sport->port); in imx_mctrl_check()
327 sport->port.icount.rng++; in imx_mctrl_check()
329 sport->port.icount.dsr++; in imx_mctrl_check()
331 uart_handle_dcd_change(&sport->port, status & TIOCM_CAR); in imx_mctrl_check()
333 uart_handle_cts_change(&sport->port, status & TIOCM_CTS); in imx_mctrl_check()
335 wake_up_interruptible(&sport->port.state->port.delta_msr_wait); in imx_mctrl_check()
347 if (sport->port.state) { in imx_timeout()
348 spin_lock_irqsave(&sport->port.lock, flags); in imx_timeout()
350 spin_unlock_irqrestore(&sport->port.lock, flags); in imx_timeout()
359 static void imx_stop_tx(struct uart_port *port) in imx_stop_tx() argument
361 struct imx_port *sport = (struct imx_port *)port; in imx_stop_tx()
371 temp = readl(port->membase + UCR1); in imx_stop_tx()
372 writel(temp & ~UCR1_TXMPTYEN, port->membase + UCR1); in imx_stop_tx()
375 if (port->rs485.flags & SER_RS485_ENABLED && in imx_stop_tx()
376 readl(port->membase + USR2) & USR2_TXDC) { in imx_stop_tx()
377 temp = readl(port->membase + UCR2); in imx_stop_tx()
378 if (port->rs485.flags & SER_RS485_RTS_AFTER_SEND) in imx_stop_tx()
382 writel(temp, port->membase + UCR2); in imx_stop_tx()
384 temp = readl(port->membase + UCR4); in imx_stop_tx()
386 writel(temp, port->membase + UCR4); in imx_stop_tx()
393 static void imx_stop_rx(struct uart_port *port) in imx_stop_rx() argument
395 struct imx_port *sport = (struct imx_port *)port; in imx_stop_rx()
399 if (sport->port.suspended) { in imx_stop_rx()
407 temp = readl(sport->port.membase + UCR2); in imx_stop_rx()
408 writel(temp & ~UCR2_RXEN, sport->port.membase + UCR2); in imx_stop_rx()
411 temp = readl(sport->port.membase + UCR1); in imx_stop_rx()
412 writel(temp & ~UCR1_RRDYEN, sport->port.membase + UCR1); in imx_stop_rx()
418 static void imx_enable_ms(struct uart_port *port) in imx_enable_ms() argument
420 struct imx_port *sport = (struct imx_port *)port; in imx_enable_ms()
428 struct circ_buf *xmit = &sport->port.state->xmit; in imx_transmit_buffer()
431 if (sport->port.x_char) { in imx_transmit_buffer()
433 writel(sport->port.x_char, sport->port.membase + URTX0); in imx_transmit_buffer()
434 sport->port.icount.tx++; in imx_transmit_buffer()
435 sport->port.x_char = 0; in imx_transmit_buffer()
439 if (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port)) { in imx_transmit_buffer()
440 imx_stop_tx(&sport->port); in imx_transmit_buffer()
449 temp = readl(sport->port.membase + UCR1); in imx_transmit_buffer()
453 writel(temp, sport->port.membase + UCR1); in imx_transmit_buffer()
455 writel(temp, sport->port.membase + UCR1); in imx_transmit_buffer()
461 !(readl(sport->port.membase + uts_reg(sport)) & UTS_TXFULL)) { in imx_transmit_buffer()
464 writel(xmit->buf[xmit->tail], sport->port.membase + URTX0); in imx_transmit_buffer()
466 sport->port.icount.tx++; in imx_transmit_buffer()
470 uart_write_wakeup(&sport->port); in imx_transmit_buffer()
473 imx_stop_tx(&sport->port); in imx_transmit_buffer()
480 struct circ_buf *xmit = &sport->port.state->xmit; in dma_tx_callback()
484 spin_lock_irqsave(&sport->port.lock, flags); in dma_tx_callback()
486 dma_unmap_sg(sport->port.dev, sgl, sport->dma_tx_nents, DMA_TO_DEVICE); in dma_tx_callback()
488 temp = readl(sport->port.membase + UCR1); in dma_tx_callback()
490 writel(temp, sport->port.membase + UCR1); in dma_tx_callback()
494 sport->port.icount.tx += sport->tx_bytes; in dma_tx_callback()
496 dev_dbg(sport->port.dev, "we finish the TX DMA.\n"); in dma_tx_callback()
500 spin_unlock_irqrestore(&sport->port.lock, flags); in dma_tx_callback()
503 uart_write_wakeup(&sport->port); in dma_tx_callback()
507 dev_dbg(sport->port.dev, "exit in %s.\n", __func__); in dma_tx_callback()
511 spin_lock_irqsave(&sport->port.lock, flags); in dma_tx_callback()
512 if (!uart_circ_empty(xmit) && !uart_tx_stopped(&sport->port)) in dma_tx_callback()
514 spin_unlock_irqrestore(&sport->port.lock, flags); in dma_tx_callback()
519 struct circ_buf *xmit = &sport->port.state->xmit; in imx_dma_tx()
523 struct device *dev = sport->port.dev; in imx_dma_tx()
562 temp = readl(sport->port.membase + UCR1); in imx_dma_tx()
564 writel(temp, sport->port.membase + UCR1); in imx_dma_tx()
576 static void imx_start_tx(struct uart_port *port) in imx_start_tx() argument
578 struct imx_port *sport = (struct imx_port *)port; in imx_start_tx()
581 if (port->rs485.flags & SER_RS485_ENABLED) { in imx_start_tx()
583 temp = readl(port->membase + UCR2); in imx_start_tx()
584 if (port->rs485.flags & SER_RS485_RTS_ON_SEND) in imx_start_tx()
588 writel(temp, port->membase + UCR2); in imx_start_tx()
590 temp = readl(port->membase + UCR4); in imx_start_tx()
592 writel(temp, port->membase + UCR4); in imx_start_tx()
596 temp = readl(sport->port.membase + UCR1); in imx_start_tx()
597 writel(temp | UCR1_TXMPTYEN, sport->port.membase + UCR1); in imx_start_tx()
601 if (sport->port.x_char) { in imx_start_tx()
604 temp = readl(sport->port.membase + UCR1); in imx_start_tx()
607 writel(temp, sport->port.membase + UCR1); in imx_start_tx()
611 if (!uart_circ_empty(&port->state->xmit) && in imx_start_tx()
612 !uart_tx_stopped(port)) in imx_start_tx()
624 spin_lock_irqsave(&sport->port.lock, flags); in imx_rtsint()
626 writel(USR1_RTSD, sport->port.membase + USR1); in imx_rtsint()
627 val = readl(sport->port.membase + USR1) & USR1_RTSS; in imx_rtsint()
628 uart_handle_cts_change(&sport->port, !!val); in imx_rtsint()
629 wake_up_interruptible(&sport->port.state->port.delta_msr_wait); in imx_rtsint()
631 spin_unlock_irqrestore(&sport->port.lock, flags); in imx_rtsint()
640 spin_lock_irqsave(&sport->port.lock, flags); in imx_txint()
642 spin_unlock_irqrestore(&sport->port.lock, flags); in imx_txint()
650 struct tty_port *port = &sport->port.state->port; in imx_rxint() local
653 spin_lock_irqsave(&sport->port.lock, flags); in imx_rxint()
655 while (readl(sport->port.membase + USR2) & USR2_RDR) { in imx_rxint()
657 sport->port.icount.rx++; in imx_rxint()
659 rx = readl(sport->port.membase + URXD0); in imx_rxint()
661 temp = readl(sport->port.membase + USR2); in imx_rxint()
663 writel(USR2_BRCD, sport->port.membase + USR2); in imx_rxint()
664 if (uart_handle_break(&sport->port)) in imx_rxint()
668 if (uart_handle_sysrq_char(&sport->port, (unsigned char)rx)) in imx_rxint()
673 sport->port.icount.brk++; in imx_rxint()
675 sport->port.icount.parity++; in imx_rxint()
677 sport->port.icount.frame++; in imx_rxint()
679 sport->port.icount.overrun++; in imx_rxint()
681 if (rx & sport->port.ignore_status_mask) { in imx_rxint()
687 rx &= (sport->port.read_status_mask | 0xFF); in imx_rxint()
699 sport->port.sysrq = 0; in imx_rxint()
703 if (sport->port.ignore_status_mask & URXD_DUMMY_READ) in imx_rxint()
706 if (tty_insert_flip_char(port, rx, flg) == 0) in imx_rxint()
707 sport->port.icount.buf_overrun++; in imx_rxint()
711 spin_unlock_irqrestore(&sport->port.lock, flags); in imx_rxint()
712 tty_flip_buffer_push(port); in imx_rxint()
726 spin_lock_irqsave(&sport->port.lock, flags); in imx_dma_rxint()
728 temp = readl(sport->port.membase + USR2); in imx_dma_rxint()
733 temp = readl(sport->port.membase + UCR1); in imx_dma_rxint()
735 writel(temp, sport->port.membase + UCR1); in imx_dma_rxint()
737 temp = readl(sport->port.membase + UCR2); in imx_dma_rxint()
739 writel(temp, sport->port.membase + UCR2); in imx_dma_rxint()
745 spin_unlock_irqrestore(&sport->port.lock, flags); in imx_dma_rxint()
754 sts = readl(sport->port.membase + USR1); in imx_int()
755 sts2 = readl(sport->port.membase + USR2); in imx_int()
765 readl(sport->port.membase + UCR1) & UCR1_TXMPTYEN) || in imx_int()
767 readl(sport->port.membase + UCR4) & UCR4_TCEN)) in imx_int()
774 writel(USR1_AWAKE, sport->port.membase + USR1); in imx_int()
777 sport->port.icount.overrun++; in imx_int()
778 writel(USR2_ORE, sport->port.membase + USR2); in imx_int()
787 static unsigned int imx_tx_empty(struct uart_port *port) in imx_tx_empty() argument
789 struct imx_port *sport = (struct imx_port *)port; in imx_tx_empty()
792 ret = (readl(sport->port.membase + USR2) & USR2_TXDC) ? TIOCSER_TEMT : 0; in imx_tx_empty()
804 static unsigned int imx_get_mctrl(struct uart_port *port) in imx_get_mctrl() argument
806 struct imx_port *sport = (struct imx_port *)port; in imx_get_mctrl()
809 if (readl(sport->port.membase + USR1) & USR1_RTSS) in imx_get_mctrl()
812 if (readl(sport->port.membase + UCR2) & UCR2_CTS) in imx_get_mctrl()
815 if (readl(sport->port.membase + uts_reg(sport)) & UTS_LOOP) in imx_get_mctrl()
821 static void imx_set_mctrl(struct uart_port *port, unsigned int mctrl) in imx_set_mctrl() argument
823 struct imx_port *sport = (struct imx_port *)port; in imx_set_mctrl()
826 if (!(port->rs485.flags & SER_RS485_ENABLED)) { in imx_set_mctrl()
827 temp = readl(sport->port.membase + UCR2); in imx_set_mctrl()
831 writel(temp, sport->port.membase + UCR2); in imx_set_mctrl()
834 temp = readl(sport->port.membase + uts_reg(sport)) & ~UTS_LOOP; in imx_set_mctrl()
837 writel(temp, sport->port.membase + uts_reg(sport)); in imx_set_mctrl()
843 static void imx_break_ctl(struct uart_port *port, int break_state) in imx_break_ctl() argument
845 struct imx_port *sport = (struct imx_port *)port; in imx_break_ctl()
848 spin_lock_irqsave(&sport->port.lock, flags); in imx_break_ctl()
850 temp = readl(sport->port.membase + UCR1) & ~UCR1_SNDBRK; in imx_break_ctl()
855 writel(temp, sport->port.membase + UCR1); in imx_break_ctl()
857 spin_unlock_irqrestore(&sport->port.lock, flags); in imx_break_ctl()
866 spin_lock_irqsave(&sport->port.lock, flags); in imx_rx_dma_done()
869 temp = readl(sport->port.membase + UCR1); in imx_rx_dma_done()
871 writel(temp, sport->port.membase + UCR1); in imx_rx_dma_done()
873 temp = readl(sport->port.membase + UCR2); in imx_rx_dma_done()
875 writel(temp, sport->port.membase + UCR2); in imx_rx_dma_done()
883 spin_unlock_irqrestore(&sport->port.lock, flags); in imx_rx_dma_done()
899 struct tty_port *port = &sport->port.state->port; in dma_rx_callback() local
905 dma_unmap_sg(sport->port.dev, sgl, 1, DMA_FROM_DEVICE); in dma_rx_callback()
910 dev_dbg(sport->port.dev, "We get %d bytes.\n", count); in dma_rx_callback()
913 if (!(sport->port.ignore_status_mask & URXD_DUMMY_READ)) { in dma_rx_callback()
914 int bytes = tty_insert_flip_string(port, sport->rx_buf, in dma_rx_callback()
918 sport->port.icount.buf_overrun++; in dma_rx_callback()
920 tty_flip_buffer_push(port); in dma_rx_callback()
921 sport->port.icount.rx += count; in dma_rx_callback()
932 if (readl(sport->port.membase + USR2) & USR2_RDR) in dma_rx_callback()
942 struct device *dev = sport->port.dev; in start_rx_dma()
979 val = readl(sport->port.membase + UFCR) & (UFCR_RFDIV | UFCR_DCEDTE); in imx_setup_ufcr()
981 writel(val, sport->port.membase + UFCR); in imx_setup_ufcr()
1005 struct device *dev = sport->port.dev; in imx_uart_dma_init()
1017 slave_config.src_addr = sport->port.mapbase + URXD0; in imx_uart_dma_init()
1042 slave_config.dst_addr = sport->port.mapbase + URTX0; in imx_uart_dma_init()
1066 temp = readl(sport->port.membase + UCR1); in imx_enable_dma()
1068 writel(temp, sport->port.membase + UCR1); in imx_enable_dma()
1070 temp = readl(sport->port.membase + UCR2); in imx_enable_dma()
1072 writel(temp, sport->port.membase + UCR2); in imx_enable_dma()
1084 temp = readl(sport->port.membase + UCR1); in imx_disable_dma()
1086 writel(temp, sport->port.membase + UCR1); in imx_disable_dma()
1089 temp = readl(sport->port.membase + UCR2); in imx_disable_dma()
1091 writel(temp, sport->port.membase + UCR2); in imx_disable_dma()
1101 static int imx_startup(struct uart_port *port) in imx_startup() argument
1103 struct imx_port *sport = (struct imx_port *)port; in imx_startup()
1121 temp = readl(sport->port.membase + UCR4); in imx_startup()
1127 writel(temp & ~UCR4_DREN, sport->port.membase + UCR4); in imx_startup()
1130 if (is_imx6q_uart(sport) && !uart_console(port) && in imx_startup()
1134 spin_lock_irqsave(&sport->port.lock, flags); in imx_startup()
1138 temp = readl(sport->port.membase + UCR2); in imx_startup()
1140 writel(temp, sport->port.membase + UCR2); in imx_startup()
1142 while (!(readl(sport->port.membase + UCR2) & UCR2_SRST) && (--i > 0)) in imx_startup()
1148 writel(USR1_RTSD, sport->port.membase + USR1); in imx_startup()
1149 writel(USR2_ORE, sport->port.membase + USR2); in imx_startup()
1154 temp = readl(sport->port.membase + UCR1); in imx_startup()
1157 writel(temp, sport->port.membase + UCR1); in imx_startup()
1159 temp = readl(sport->port.membase + UCR4); in imx_startup()
1161 writel(temp, sport->port.membase + UCR4); in imx_startup()
1163 temp = readl(sport->port.membase + UCR2); in imx_startup()
1167 writel(temp, sport->port.membase + UCR2); in imx_startup()
1170 temp = readl(sport->port.membase + UCR3); in imx_startup()
1172 writel(temp, sport->port.membase + UCR3); in imx_startup()
1178 imx_enable_ms(&sport->port); in imx_startup()
1179 spin_unlock_irqrestore(&sport->port.lock, flags); in imx_startup()
1184 static void imx_shutdown(struct uart_port *port) in imx_shutdown() argument
1186 struct imx_port *sport = (struct imx_port *)port; in imx_shutdown()
1202 spin_lock_irqsave(&sport->port.lock, flags); in imx_shutdown()
1203 imx_stop_tx(port); in imx_shutdown()
1204 imx_stop_rx(port); in imx_shutdown()
1206 spin_unlock_irqrestore(&sport->port.lock, flags); in imx_shutdown()
1210 spin_lock_irqsave(&sport->port.lock, flags); in imx_shutdown()
1211 temp = readl(sport->port.membase + UCR2); in imx_shutdown()
1213 writel(temp, sport->port.membase + UCR2); in imx_shutdown()
1214 spin_unlock_irqrestore(&sport->port.lock, flags); in imx_shutdown()
1225 spin_lock_irqsave(&sport->port.lock, flags); in imx_shutdown()
1226 temp = readl(sport->port.membase + UCR1); in imx_shutdown()
1229 writel(temp, sport->port.membase + UCR1); in imx_shutdown()
1230 spin_unlock_irqrestore(&sport->port.lock, flags); in imx_shutdown()
1236 static void imx_flush_buffer(struct uart_port *port) in imx_flush_buffer() argument
1238 struct imx_port *sport = (struct imx_port *)port; in imx_flush_buffer()
1249 dma_unmap_sg(sport->port.dev, sgl, sport->dma_tx_nents, in imx_flush_buffer()
1251 temp = readl(sport->port.membase + UCR1); in imx_flush_buffer()
1253 writel(temp, sport->port.membase + UCR1); in imx_flush_buffer()
1264 ubir = readl(sport->port.membase + UBIR); in imx_flush_buffer()
1265 ubmr = readl(sport->port.membase + UBMR); in imx_flush_buffer()
1266 uts = readl(sport->port.membase + IMX21_UTS); in imx_flush_buffer()
1268 temp = readl(sport->port.membase + UCR2); in imx_flush_buffer()
1270 writel(temp, sport->port.membase + UCR2); in imx_flush_buffer()
1272 while (!(readl(sport->port.membase + UCR2) & UCR2_SRST) && (--i > 0)) in imx_flush_buffer()
1276 writel(ubir, sport->port.membase + UBIR); in imx_flush_buffer()
1277 writel(ubmr, sport->port.membase + UBMR); in imx_flush_buffer()
1278 writel(uts, sport->port.membase + IMX21_UTS); in imx_flush_buffer()
1282 imx_set_termios(struct uart_port *port, struct ktermios *termios, in imx_set_termios() argument
1285 struct imx_port *sport = (struct imx_port *)port; in imx_set_termios()
1312 if (port->rs485.flags & SER_RS485_ENABLED) { in imx_set_termios()
1318 if (!(port->rs485.flags & in imx_set_termios()
1327 } else if (port->rs485.flags & SER_RS485_ENABLED) in imx_set_termios()
1329 if (!(port->rs485.flags & SER_RS485_RTS_AFTER_SEND)) in imx_set_termios()
1345 baud = uart_get_baud_rate(port, termios, old, 50, port->uartclk / 16); in imx_set_termios()
1346 quot = uart_get_divisor(port, baud); in imx_set_termios()
1348 spin_lock_irqsave(&sport->port.lock, flags); in imx_set_termios()
1350 sport->port.read_status_mask = 0; in imx_set_termios()
1352 sport->port.read_status_mask |= (URXD_FRMERR | URXD_PRERR); in imx_set_termios()
1354 sport->port.read_status_mask |= URXD_BRK; in imx_set_termios()
1359 sport->port.ignore_status_mask = 0; in imx_set_termios()
1361 sport->port.ignore_status_mask |= URXD_PRERR | URXD_FRMERR; in imx_set_termios()
1363 sport->port.ignore_status_mask |= URXD_BRK; in imx_set_termios()
1369 sport->port.ignore_status_mask |= URXD_OVRRUN; in imx_set_termios()
1373 sport->port.ignore_status_mask |= URXD_DUMMY_READ; in imx_set_termios()
1378 uart_update_timeout(port, termios->c_cflag, baud); in imx_set_termios()
1383 old_ucr1 = readl(sport->port.membase + UCR1); in imx_set_termios()
1385 sport->port.membase + UCR1); in imx_set_termios()
1387 while (!(readl(sport->port.membase + USR2) & USR2_TXDC)) in imx_set_termios()
1391 old_ucr2 = readl(sport->port.membase + UCR2); in imx_set_termios()
1393 sport->port.membase + UCR2); in imx_set_termios()
1397 div = sport->port.uartclk / (baud * 16); in imx_set_termios()
1399 baud = sport->port.uartclk / (quot * 16); in imx_set_termios()
1401 div = sport->port.uartclk / (baud * 16); in imx_set_termios()
1407 rational_best_approximation(16 * div * baud, sport->port.uartclk, in imx_set_termios()
1410 tdiv64 = sport->port.uartclk; in imx_set_termios()
1419 ufcr = readl(sport->port.membase + UFCR); in imx_set_termios()
1423 writel(ufcr, sport->port.membase + UFCR); in imx_set_termios()
1425 writel(num, sport->port.membase + UBIR); in imx_set_termios()
1426 writel(denom, sport->port.membase + UBMR); in imx_set_termios()
1429 writel(sport->port.uartclk / div / 1000, in imx_set_termios()
1430 sport->port.membase + IMX21_ONEMS); in imx_set_termios()
1432 writel(old_ucr1, sport->port.membase + UCR1); in imx_set_termios()
1435 writel(ucr2 | old_ucr2, sport->port.membase + UCR2); in imx_set_termios()
1437 if (UART_ENABLE_MS(&sport->port, termios->c_cflag)) in imx_set_termios()
1438 imx_enable_ms(&sport->port); in imx_set_termios()
1440 spin_unlock_irqrestore(&sport->port.lock, flags); in imx_set_termios()
1443 static const char *imx_type(struct uart_port *port) in imx_type() argument
1445 struct imx_port *sport = (struct imx_port *)port; in imx_type()
1447 return sport->port.type == PORT_IMX ? "IMX" : NULL; in imx_type()
1453 static void imx_config_port(struct uart_port *port, int flags) in imx_config_port() argument
1455 struct imx_port *sport = (struct imx_port *)port; in imx_config_port()
1458 sport->port.type = PORT_IMX; in imx_config_port()
1467 imx_verify_port(struct uart_port *port, struct serial_struct *ser) in imx_verify_port() argument
1469 struct imx_port *sport = (struct imx_port *)port; in imx_verify_port()
1474 if (sport->port.irq != ser->irq) in imx_verify_port()
1478 if (sport->port.uartclk / 16 != ser->baud_base) in imx_verify_port()
1480 if (sport->port.mapbase != (unsigned long)ser->iomem_base) in imx_verify_port()
1482 if (sport->port.iobase != ser->port) in imx_verify_port()
1491 static int imx_poll_init(struct uart_port *port) in imx_poll_init() argument
1493 struct imx_port *sport = (struct imx_port *)port; in imx_poll_init()
1507 spin_lock_irqsave(&sport->port.lock, flags); in imx_poll_init()
1509 temp = readl(sport->port.membase + UCR1); in imx_poll_init()
1514 writel(temp, sport->port.membase + UCR1); in imx_poll_init()
1516 temp = readl(sport->port.membase + UCR2); in imx_poll_init()
1518 writel(temp, sport->port.membase + UCR2); in imx_poll_init()
1520 spin_unlock_irqrestore(&sport->port.lock, flags); in imx_poll_init()
1525 static int imx_poll_get_char(struct uart_port *port) in imx_poll_get_char() argument
1527 if (!(readl_relaxed(port->membase + USR2) & USR2_RDR)) in imx_poll_get_char()
1530 return readl_relaxed(port->membase + URXD0) & URXD_RX_DATA; in imx_poll_get_char()
1533 static void imx_poll_put_char(struct uart_port *port, unsigned char c) in imx_poll_put_char() argument
1539 status = readl_relaxed(port->membase + USR1); in imx_poll_put_char()
1543 writel_relaxed(c, port->membase + URTX0); in imx_poll_put_char()
1547 status = readl_relaxed(port->membase + USR2); in imx_poll_put_char()
1552 static int imx_rs485_config(struct uart_port *port, in imx_rs485_config() argument
1555 struct imx_port *sport = (struct imx_port *)port; in imx_rs485_config()
1570 temp = readl(sport->port.membase + UCR2); in imx_rs485_config()
1576 writel(temp, sport->port.membase + UCR2); in imx_rs485_config()
1579 port->rs485 = *rs485conf; in imx_rs485_config()
1610 static void imx_console_putchar(struct uart_port *port, int ch) in imx_console_putchar() argument
1612 struct imx_port *sport = (struct imx_port *)port; in imx_console_putchar()
1614 while (readl(sport->port.membase + uts_reg(sport)) & UTS_TXFULL) in imx_console_putchar()
1617 writel(ch, sport->port.membase + URTX0); in imx_console_putchar()
1642 if (sport->port.sysrq) in imx_console_write()
1645 locked = spin_trylock_irqsave(&sport->port.lock, flags); in imx_console_write()
1647 spin_lock_irqsave(&sport->port.lock, flags); in imx_console_write()
1652 imx_port_ucrs_save(&sport->port, &old_ucr); in imx_console_write()
1660 writel(ucr1, sport->port.membase + UCR1); in imx_console_write()
1662 writel(old_ucr.ucr2 | UCR2_TXEN, sport->port.membase + UCR2); in imx_console_write()
1664 uart_console_write(&sport->port, s, count, imx_console_putchar); in imx_console_write()
1670 while (!(readl(sport->port.membase + USR2) & USR2_TXDC)); in imx_console_write()
1672 imx_port_ucrs_restore(&sport->port, &old_ucr); in imx_console_write()
1675 spin_unlock_irqrestore(&sport->port.lock, flags); in imx_console_write()
1690 if (readl(sport->port.membase + UCR1) & UCR1_UARTEN) { in imx_console_get_options()
1696 ucr2 = readl(sport->port.membase + UCR2); in imx_console_get_options()
1711 ubir = readl(sport->port.membase + UBIR) & 0xffff; in imx_console_get_options()
1712 ubmr = readl(sport->port.membase + UBMR) & 0xffff; in imx_console_get_options()
1714 ucfr_rfdiv = (readl(sport->port.membase + UFCR) & UFCR_RFDIV) >> 7; in imx_console_get_options()
1777 retval = uart_set_options(&sport->port, co, baud, parity, bits, flow); in imx_console_setup()
1807 static void imx_console_early_putchar(struct uart_port *port, int ch) in imx_console_early_putchar() argument
1809 while (readl_relaxed(port->membase + IMX21_UTS) & UTS_TXFULL) in imx_console_early_putchar()
1812 writel_relaxed(ch, port->membase + URTX0); in imx_console_early_putchar()
1820 uart_console_write(&dev->port, s, count, imx_console_early_putchar); in imx_console_early_write()
1826 if (!dev->port.membase) in imx_console_early_setup()
1873 sport->port.line = ret; in serial_imx_probe_dt()
1898 sport->port.line = pdev->id; in serial_imx_probe_pdata()
1935 sport->port.dev = &pdev->dev; in serial_imx_probe()
1936 sport->port.mapbase = res->start; in serial_imx_probe()
1937 sport->port.membase = base; in serial_imx_probe()
1938 sport->port.type = PORT_IMX, in serial_imx_probe()
1939 sport->port.iotype = UPIO_MEM; in serial_imx_probe()
1940 sport->port.irq = rxirq; in serial_imx_probe()
1941 sport->port.fifosize = 32; in serial_imx_probe()
1942 sport->port.ops = &imx_pops; in serial_imx_probe()
1943 sport->port.rs485_config = imx_rs485_config; in serial_imx_probe()
1944 sport->port.rs485.flags = in serial_imx_probe()
1946 sport->port.flags = UPF_BOOT_AUTOCONF; in serial_imx_probe()
1965 sport->port.uartclk = clk_get_rate(sport->clk_per); in serial_imx_probe()
1973 reg = readl_relaxed(sport->port.membase + UCR1); in serial_imx_probe()
1976 writel_relaxed(reg, sport->port.membase + UCR1); in serial_imx_probe()
2001 imx_ports[sport->port.line] = sport; in serial_imx_probe()
2005 return uart_add_one_port(&imx_reg, &sport->port); in serial_imx_probe()
2012 return uart_remove_one_port(&imx_reg, &sport->port); in serial_imx_remove()
2020 writel(sport->saved_reg[4], sport->port.membase + UFCR); in serial_imx_restore_context()
2021 writel(sport->saved_reg[5], sport->port.membase + UESC); in serial_imx_restore_context()
2022 writel(sport->saved_reg[6], sport->port.membase + UTIM); in serial_imx_restore_context()
2023 writel(sport->saved_reg[7], sport->port.membase + UBIR); in serial_imx_restore_context()
2024 writel(sport->saved_reg[8], sport->port.membase + UBMR); in serial_imx_restore_context()
2025 writel(sport->saved_reg[9], sport->port.membase + IMX21_UTS); in serial_imx_restore_context()
2026 writel(sport->saved_reg[0], sport->port.membase + UCR1); in serial_imx_restore_context()
2027 writel(sport->saved_reg[1] | UCR2_SRST, sport->port.membase + UCR2); in serial_imx_restore_context()
2028 writel(sport->saved_reg[2], sport->port.membase + UCR3); in serial_imx_restore_context()
2029 writel(sport->saved_reg[3], sport->port.membase + UCR4); in serial_imx_restore_context()
2036 sport->saved_reg[0] = readl(sport->port.membase + UCR1); in serial_imx_save_context()
2037 sport->saved_reg[1] = readl(sport->port.membase + UCR2); in serial_imx_save_context()
2038 sport->saved_reg[2] = readl(sport->port.membase + UCR3); in serial_imx_save_context()
2039 sport->saved_reg[3] = readl(sport->port.membase + UCR4); in serial_imx_save_context()
2040 sport->saved_reg[4] = readl(sport->port.membase + UFCR); in serial_imx_save_context()
2041 sport->saved_reg[5] = readl(sport->port.membase + UESC); in serial_imx_save_context()
2042 sport->saved_reg[6] = readl(sport->port.membase + UTIM); in serial_imx_save_context()
2043 sport->saved_reg[7] = readl(sport->port.membase + UBIR); in serial_imx_save_context()
2044 sport->saved_reg[8] = readl(sport->port.membase + UBMR); in serial_imx_save_context()
2045 sport->saved_reg[9] = readl(sport->port.membase + IMX21_UTS); in serial_imx_save_context()
2053 val = readl(sport->port.membase + UCR3); in serial_imx_enable_wakeup()
2058 writel(val, sport->port.membase + UCR3); in serial_imx_enable_wakeup()
2060 val = readl(sport->port.membase + UCR1); in serial_imx_enable_wakeup()
2065 writel(val, sport->port.membase + UCR1); in serial_imx_enable_wakeup()
2110 uart_suspend_port(&imx_reg, &sport->port); in imx_serial_port_suspend()
2123 uart_resume_port(&imx_reg, &sport->port); in imx_serial_port_resume()