Lines Matching refs:UARTCR5
40 #define UARTCR5 0x0b macro
363 writeb(readb(sport->port.membase + UARTCR5) | UARTCR5_TDMAS, in lpuart_pio_tx()
364 sport->port.membase + UARTCR5); in lpuart_pio_tx()
406 writeb(readb(sport->port.membase + UARTCR5) & ~UARTCR5_TDMAS, in lpuart_prepare_tx()
407 sport->port.membase + UARTCR5); in lpuart_prepare_tx()
409 writeb(readb(sport->port.membase + UARTCR5) | UARTCR5_TDMAS, in lpuart_prepare_tx()
410 sport->port.membase + UARTCR5); in lpuart_prepare_tx()
507 temp = readb(sport->port.membase + UARTCR5); in lpuart_timer_func()
508 writeb(temp & ~UARTCR5_RDMAS, sport->port.membase + UARTCR5); in lpuart_timer_func()
524 temp = readb(sport->port.membase + UARTCR5); in lpuart_prepare_rx()
525 writeb(temp | UARTCR5_RDMAS, sport->port.membase + UARTCR5); in lpuart_prepare_rx()
772 crdma = readb(sport->port.membase + UARTCR5); in lpuart_int()
1097 temp = readb(port->membase + UARTCR5); in lpuart_startup()
1099 writeb(temp | UARTCR5_TDMAS, port->membase + UARTCR5); in lpuart_startup()