Lines Matching refs:IO_STATE

1150 		    IO_STATE(R_GEN_CONFIG, dma6, serial0)) {  in e100_disable_txdma_channel()
1152 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma6, unused); in e100_disable_txdma_channel()
1156 IO_STATE(R_GEN_CONFIG, dma8, serial1)) { in e100_disable_txdma_channel()
1158 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma8, usb); in e100_disable_txdma_channel()
1162 IO_STATE(R_GEN_CONFIG, dma2, serial2)) { in e100_disable_txdma_channel()
1164 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma2, par0); in e100_disable_txdma_channel()
1168 IO_STATE(R_GEN_CONFIG, dma4, serial3)) { in e100_disable_txdma_channel()
1170 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma4, par1); in e100_disable_txdma_channel()
1187 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma6, serial0); in e100_enable_txdma_channel()
1190 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma8, serial1); in e100_enable_txdma_channel()
1193 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma2, serial2); in e100_enable_txdma_channel()
1196 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma4, serial3); in e100_enable_txdma_channel()
1212 IO_STATE(R_GEN_CONFIG, dma7, serial0)) { in e100_disable_rxdma_channel()
1214 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma7, unused); in e100_disable_rxdma_channel()
1218 IO_STATE(R_GEN_CONFIG, dma9, serial1)) { in e100_disable_rxdma_channel()
1220 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma9, usb); in e100_disable_rxdma_channel()
1224 IO_STATE(R_GEN_CONFIG, dma3, serial2)) { in e100_disable_rxdma_channel()
1226 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma3, par0); in e100_disable_rxdma_channel()
1230 IO_STATE(R_GEN_CONFIG, dma5, serial3)) { in e100_disable_rxdma_channel()
1232 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma5, par1); in e100_disable_rxdma_channel()
1248 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma7, serial0); in e100_enable_rxdma_channel()
1251 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma9, serial1); in e100_enable_rxdma_channel()
1254 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma3, serial2); in e100_enable_rxdma_channel()
1257 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma5, serial3); in e100_enable_rxdma_channel()
1415 xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, stop); in rs_stop()
1417 xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable); in rs_stop()
1438 xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, enable); in rs_start()
1440 xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable); in rs_start()
1504 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) | in transmit_chars_dma()
1505 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do); in transmit_chars_dma()
1581 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, start); in transmit_chars_dma()
1777 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) | in receive_chars_dma()
1778 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do); in receive_chars_dma()
1820 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, restart); in receive_chars_dma()
1851 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, start); in start_recv_dma()
1863 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset); in start_receive()
2371 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, restart); in handle_ser_rx_interrupt()
2411 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, continue); in handle_ser_tx_interrupt()
2518 *R_VECT_MASK_SET = IO_STATE(R_VECT_MASK_SET, serial, set); in ser_interrupt()
2632 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset); in startup()
2640 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) | in startup()
2641 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do); in startup()
2649 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset); in startup()
2656 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) | in startup()
2657 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do); in startup()
2734 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset); in shutdown()
2743 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset); in shutdown()
2810 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, normal) | in change_speed()
2811 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, normal); in change_speed()
2821 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, prescale) | in change_speed()
2822 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, prescale); in change_speed()
2844 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, normal) | in change_speed()
2845 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, normal); in change_speed()
2870 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_bitnr, tr_7bit); in change_speed()
2871 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_bitnr, rec_7bit); in change_speed()
2876 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, stop_bits, two_bits); in change_speed()
2881 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_par_en, enable); in change_speed()
2882 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_par_en, enable); in change_speed()
2887 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_stick_par, stick); in change_speed()
2888 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_stick_par, stick); in change_speed()
2892 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_par, odd); in change_speed()
2893 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_par, odd); in change_speed()
2899 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, auto_cts, active); in change_speed()
2904 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_enable, enable); in change_speed()
2905 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_enable, enable); in change_speed()
2912 xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, enable); in change_speed()
2916 xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable); in change_speed()
3134 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, hold); in rs_send_xchar()