Lines Matching refs:uap
192 static int pl011_fifo_to_tty(struct uart_amba_port *uap) in pl011_fifo_to_tty() argument
199 status = readw(uap->port.membase + UART01x_FR); in pl011_fifo_to_tty()
204 ch = readw(uap->port.membase + UART01x_DR) | in pl011_fifo_to_tty()
207 uap->port.icount.rx++; in pl011_fifo_to_tty()
213 uap->port.icount.brk++; in pl011_fifo_to_tty()
214 if (uart_handle_break(&uap->port)) in pl011_fifo_to_tty()
217 uap->port.icount.parity++; in pl011_fifo_to_tty()
219 uap->port.icount.frame++; in pl011_fifo_to_tty()
221 uap->port.icount.overrun++; in pl011_fifo_to_tty()
223 ch &= uap->port.read_status_mask; in pl011_fifo_to_tty()
233 if (uart_handle_sysrq_char(&uap->port, ch & 255)) in pl011_fifo_to_tty()
236 uart_insert_char(&uap->port, ch, UART011_DR_OE, ch, flag); in pl011_fifo_to_tty()
281 static void pl011_dma_probe(struct uart_amba_port *uap) in pl011_dma_probe() argument
284 struct amba_pl011_data *plat = dev_get_platdata(uap->port.dev); in pl011_dma_probe()
285 struct device *dev = uap->port.dev; in pl011_dma_probe()
287 .dst_addr = uap->port.mapbase + UART01x_DR, in pl011_dma_probe()
290 .dst_maxburst = uap->fifosize >> 1, in pl011_dma_probe()
296 uap->dma_probed = true; in pl011_dma_probe()
300 uap->dma_probed = false; in pl011_dma_probe()
306 dev_info(uap->port.dev, "no DMA platform data\n"); in pl011_dma_probe()
317 dev_err(uap->port.dev, "no TX DMA channel!\n"); in pl011_dma_probe()
323 uap->dmatx.chan = chan; in pl011_dma_probe()
325 dev_info(uap->port.dev, "DMA channel TX %s\n", in pl011_dma_probe()
326 dma_chan_name(uap->dmatx.chan)); in pl011_dma_probe()
335 dev_err(uap->port.dev, "no RX DMA channel!\n"); in pl011_dma_probe()
342 .src_addr = uap->port.mapbase + UART01x_DR, in pl011_dma_probe()
345 .src_maxburst = uap->fifosize >> 2, in pl011_dma_probe()
359 dev_info(uap->port.dev, in pl011_dma_probe()
365 uap->dmarx.chan = chan; in pl011_dma_probe()
367 uap->dmarx.auto_poll_rate = false; in pl011_dma_probe()
371 uap->dmarx.auto_poll_rate = false; in pl011_dma_probe()
372 uap->dmarx.poll_rate = plat->dma_rx_poll_rate; in pl011_dma_probe()
379 uap->dmarx.auto_poll_rate = true; in pl011_dma_probe()
380 uap->dmarx.poll_rate = 100; in pl011_dma_probe()
384 uap->dmarx.poll_timeout = in pl011_dma_probe()
387 uap->dmarx.poll_timeout = 3000; in pl011_dma_probe()
389 uap->dmarx.auto_poll_rate = of_property_read_bool( in pl011_dma_probe()
391 if (uap->dmarx.auto_poll_rate) { in pl011_dma_probe()
396 uap->dmarx.poll_rate = x; in pl011_dma_probe()
398 uap->dmarx.poll_rate = 100; in pl011_dma_probe()
401 uap->dmarx.poll_timeout = x; in pl011_dma_probe()
403 uap->dmarx.poll_timeout = 3000; in pl011_dma_probe()
406 dev_info(uap->port.dev, "DMA channel RX %s\n", in pl011_dma_probe()
407 dma_chan_name(uap->dmarx.chan)); in pl011_dma_probe()
411 static void pl011_dma_remove(struct uart_amba_port *uap) in pl011_dma_remove() argument
413 if (uap->dmatx.chan) in pl011_dma_remove()
414 dma_release_channel(uap->dmatx.chan); in pl011_dma_remove()
415 if (uap->dmarx.chan) in pl011_dma_remove()
416 dma_release_channel(uap->dmarx.chan); in pl011_dma_remove()
420 static int pl011_dma_tx_refill(struct uart_amba_port *uap);
421 static void pl011_start_tx_pio(struct uart_amba_port *uap);
429 struct uart_amba_port *uap = data; in pl011_dma_tx_callback() local
430 struct pl011_dmatx_data *dmatx = &uap->dmatx; in pl011_dma_tx_callback()
434 spin_lock_irqsave(&uap->port.lock, flags); in pl011_dma_tx_callback()
435 if (uap->dmatx.queued) in pl011_dma_tx_callback()
439 dmacr = uap->dmacr; in pl011_dma_tx_callback()
440 uap->dmacr = dmacr & ~UART011_TXDMAE; in pl011_dma_tx_callback()
441 writew(uap->dmacr, uap->port.membase + UART011_DMACR); in pl011_dma_tx_callback()
452 if (!(dmacr & UART011_TXDMAE) || uart_tx_stopped(&uap->port) || in pl011_dma_tx_callback()
453 uart_circ_empty(&uap->port.state->xmit)) { in pl011_dma_tx_callback()
454 uap->dmatx.queued = false; in pl011_dma_tx_callback()
455 spin_unlock_irqrestore(&uap->port.lock, flags); in pl011_dma_tx_callback()
459 if (pl011_dma_tx_refill(uap) <= 0) in pl011_dma_tx_callback()
464 pl011_start_tx_pio(uap); in pl011_dma_tx_callback()
466 spin_unlock_irqrestore(&uap->port.lock, flags); in pl011_dma_tx_callback()
477 static int pl011_dma_tx_refill(struct uart_amba_port *uap) in pl011_dma_tx_refill() argument
479 struct pl011_dmatx_data *dmatx = &uap->dmatx; in pl011_dma_tx_refill()
483 struct circ_buf *xmit = &uap->port.state->xmit; in pl011_dma_tx_refill()
493 if (count < (uap->fifosize >> 1)) { in pl011_dma_tx_refill()
494 uap->dmatx.queued = false; in pl011_dma_tx_refill()
526 uap->dmatx.queued = false; in pl011_dma_tx_refill()
527 dev_dbg(uap->port.dev, "unable to map TX DMA\n"); in pl011_dma_tx_refill()
535 uap->dmatx.queued = false; in pl011_dma_tx_refill()
540 dev_dbg(uap->port.dev, "TX DMA busy\n"); in pl011_dma_tx_refill()
546 desc->callback_param = uap; in pl011_dma_tx_refill()
554 uap->dmacr |= UART011_TXDMAE; in pl011_dma_tx_refill()
555 writew(uap->dmacr, uap->port.membase + UART011_DMACR); in pl011_dma_tx_refill()
556 uap->dmatx.queued = true; in pl011_dma_tx_refill()
563 uap->port.icount.tx += count; in pl011_dma_tx_refill()
566 uart_write_wakeup(&uap->port); in pl011_dma_tx_refill()
579 static bool pl011_dma_tx_irq(struct uart_amba_port *uap) in pl011_dma_tx_irq() argument
581 if (!uap->using_tx_dma) in pl011_dma_tx_irq()
589 if (uap->dmatx.queued) { in pl011_dma_tx_irq()
590 uap->dmacr |= UART011_TXDMAE; in pl011_dma_tx_irq()
591 writew(uap->dmacr, uap->port.membase + UART011_DMACR); in pl011_dma_tx_irq()
592 uap->im &= ~UART011_TXIM; in pl011_dma_tx_irq()
593 writew(uap->im, uap->port.membase + UART011_IMSC); in pl011_dma_tx_irq()
601 if (pl011_dma_tx_refill(uap) > 0) { in pl011_dma_tx_irq()
602 uap->im &= ~UART011_TXIM; in pl011_dma_tx_irq()
603 writew(uap->im, uap->port.membase + UART011_IMSC); in pl011_dma_tx_irq()
613 static inline void pl011_dma_tx_stop(struct uart_amba_port *uap) in pl011_dma_tx_stop() argument
615 if (uap->dmatx.queued) { in pl011_dma_tx_stop()
616 uap->dmacr &= ~UART011_TXDMAE; in pl011_dma_tx_stop()
617 writew(uap->dmacr, uap->port.membase + UART011_DMACR); in pl011_dma_tx_stop()
629 static inline bool pl011_dma_tx_start(struct uart_amba_port *uap) in pl011_dma_tx_start() argument
633 if (!uap->using_tx_dma) in pl011_dma_tx_start()
636 if (!uap->port.x_char) { in pl011_dma_tx_start()
640 if (!uap->dmatx.queued) { in pl011_dma_tx_start()
641 if (pl011_dma_tx_refill(uap) > 0) { in pl011_dma_tx_start()
642 uap->im &= ~UART011_TXIM; in pl011_dma_tx_start()
643 writew(uap->im, uap->port.membase + in pl011_dma_tx_start()
647 } else if (!(uap->dmacr & UART011_TXDMAE)) { in pl011_dma_tx_start()
648 uap->dmacr |= UART011_TXDMAE; in pl011_dma_tx_start()
649 writew(uap->dmacr, in pl011_dma_tx_start()
650 uap->port.membase + UART011_DMACR); in pl011_dma_tx_start()
659 dmacr = uap->dmacr; in pl011_dma_tx_start()
660 uap->dmacr &= ~UART011_TXDMAE; in pl011_dma_tx_start()
661 writew(uap->dmacr, uap->port.membase + UART011_DMACR); in pl011_dma_tx_start()
663 if (readw(uap->port.membase + UART01x_FR) & UART01x_FR_TXFF) { in pl011_dma_tx_start()
672 writew(uap->port.x_char, uap->port.membase + UART01x_DR); in pl011_dma_tx_start()
673 uap->port.icount.tx++; in pl011_dma_tx_start()
674 uap->port.x_char = 0; in pl011_dma_tx_start()
677 uap->dmacr = dmacr; in pl011_dma_tx_start()
678 writew(dmacr, uap->port.membase + UART011_DMACR); in pl011_dma_tx_start()
688 __releases(&uap->port.lock) in pl011_dma_flush_buffer()
689 __acquires(&uap->port.lock) in pl011_dma_flush_buffer()
691 struct uart_amba_port *uap = in pl011_dma_flush_buffer() local
694 if (!uap->using_tx_dma) in pl011_dma_flush_buffer()
698 spin_unlock(&uap->port.lock); in pl011_dma_flush_buffer()
699 dmaengine_terminate_all(uap->dmatx.chan); in pl011_dma_flush_buffer()
700 spin_lock(&uap->port.lock); in pl011_dma_flush_buffer()
701 if (uap->dmatx.queued) { in pl011_dma_flush_buffer()
702 dma_unmap_sg(uap->dmatx.chan->device->dev, &uap->dmatx.sg, 1, in pl011_dma_flush_buffer()
704 uap->dmatx.queued = false; in pl011_dma_flush_buffer()
705 uap->dmacr &= ~UART011_TXDMAE; in pl011_dma_flush_buffer()
706 writew(uap->dmacr, uap->port.membase + UART011_DMACR); in pl011_dma_flush_buffer()
712 static int pl011_dma_rx_trigger_dma(struct uart_amba_port *uap) in pl011_dma_rx_trigger_dma() argument
714 struct dma_chan *rxchan = uap->dmarx.chan; in pl011_dma_rx_trigger_dma()
715 struct pl011_dmarx_data *dmarx = &uap->dmarx; in pl011_dma_rx_trigger_dma()
723 sgbuf = uap->dmarx.use_buf_b ? in pl011_dma_rx_trigger_dma()
724 &uap->dmarx.sgbuf_b : &uap->dmarx.sgbuf_a; in pl011_dma_rx_trigger_dma()
734 uap->dmarx.running = false; in pl011_dma_rx_trigger_dma()
741 desc->callback_param = uap; in pl011_dma_rx_trigger_dma()
745 uap->dmacr |= UART011_RXDMAE; in pl011_dma_rx_trigger_dma()
746 writew(uap->dmacr, uap->port.membase + UART011_DMACR); in pl011_dma_rx_trigger_dma()
747 uap->dmarx.running = true; in pl011_dma_rx_trigger_dma()
749 uap->im &= ~UART011_RXIM; in pl011_dma_rx_trigger_dma()
750 writew(uap->im, uap->port.membase + UART011_IMSC); in pl011_dma_rx_trigger_dma()
760 static void pl011_dma_rx_chars(struct uart_amba_port *uap, in pl011_dma_rx_chars() argument
764 struct tty_port *port = &uap->port.state->port; in pl011_dma_rx_chars()
766 &uap->dmarx.sgbuf_b : &uap->dmarx.sgbuf_a; in pl011_dma_rx_chars()
770 struct pl011_dmarx_data *dmarx = &uap->dmarx; in pl011_dma_rx_chars()
773 if (uap->dmarx.poll_rate) { in pl011_dma_rx_chars()
792 uap->port.icount.rx += dma_count; in pl011_dma_rx_chars()
794 dev_warn(uap->port.dev, in pl011_dma_rx_chars()
799 if (uap->dmarx.poll_rate) in pl011_dma_rx_chars()
809 uap->port.membase + UART011_ICR); in pl011_dma_rx_chars()
822 fifotaken = pl011_fifo_to_tty(uap); in pl011_dma_rx_chars()
825 spin_unlock(&uap->port.lock); in pl011_dma_rx_chars()
826 dev_vdbg(uap->port.dev, in pl011_dma_rx_chars()
830 spin_lock(&uap->port.lock); in pl011_dma_rx_chars()
833 static void pl011_dma_rx_irq(struct uart_amba_port *uap) in pl011_dma_rx_irq() argument
835 struct pl011_dmarx_data *dmarx = &uap->dmarx; in pl011_dma_rx_irq()
849 dev_err(uap->port.dev, "unable to pause DMA transfer\n"); in pl011_dma_rx_irq()
853 dev_err(uap->port.dev, "unable to pause DMA transfer\n"); in pl011_dma_rx_irq()
856 uap->dmacr &= ~UART011_RXDMAE; in pl011_dma_rx_irq()
857 writew(uap->dmacr, uap->port.membase + UART011_DMACR); in pl011_dma_rx_irq()
858 uap->dmarx.running = false; in pl011_dma_rx_irq()
869 pl011_dma_rx_chars(uap, pending, dmarx->use_buf_b, true); in pl011_dma_rx_irq()
873 if (pl011_dma_rx_trigger_dma(uap)) { in pl011_dma_rx_irq()
874 dev_dbg(uap->port.dev, "could not retrigger RX DMA job " in pl011_dma_rx_irq()
876 uap->im |= UART011_RXIM; in pl011_dma_rx_irq()
877 writew(uap->im, uap->port.membase + UART011_IMSC); in pl011_dma_rx_irq()
883 struct uart_amba_port *uap = data; in pl011_dma_rx_callback() local
884 struct pl011_dmarx_data *dmarx = &uap->dmarx; in pl011_dma_rx_callback()
900 spin_lock_irq(&uap->port.lock); in pl011_dma_rx_callback()
911 uap->dmarx.running = false; in pl011_dma_rx_callback()
913 ret = pl011_dma_rx_trigger_dma(uap); in pl011_dma_rx_callback()
915 pl011_dma_rx_chars(uap, pending, lastbuf, false); in pl011_dma_rx_callback()
916 spin_unlock_irq(&uap->port.lock); in pl011_dma_rx_callback()
922 dev_dbg(uap->port.dev, "could not retrigger RX DMA job " in pl011_dma_rx_callback()
924 uap->im |= UART011_RXIM; in pl011_dma_rx_callback()
925 writew(uap->im, uap->port.membase + UART011_IMSC); in pl011_dma_rx_callback()
934 static inline void pl011_dma_rx_stop(struct uart_amba_port *uap) in pl011_dma_rx_stop() argument
937 uap->dmacr &= ~UART011_RXDMAE; in pl011_dma_rx_stop()
938 writew(uap->dmacr, uap->port.membase + UART011_DMACR); in pl011_dma_rx_stop()
948 struct uart_amba_port *uap = (struct uart_amba_port *)args; in pl011_dma_rx_poll() local
949 struct tty_port *port = &uap->port.state->port; in pl011_dma_rx_poll()
950 struct pl011_dmarx_data *dmarx = &uap->dmarx; in pl011_dma_rx_poll()
951 struct dma_chan *rxchan = uap->dmarx.chan; in pl011_dma_rx_poll()
959 sgbuf = dmarx->use_buf_b ? &uap->dmarx.sgbuf_b : &uap->dmarx.sgbuf_a; in pl011_dma_rx_poll()
977 > uap->dmarx.poll_timeout) { in pl011_dma_rx_poll()
979 spin_lock_irqsave(&uap->port.lock, flags); in pl011_dma_rx_poll()
980 pl011_dma_rx_stop(uap); in pl011_dma_rx_poll()
981 uap->im |= UART011_RXIM; in pl011_dma_rx_poll()
982 writew(uap->im, uap->port.membase + UART011_IMSC); in pl011_dma_rx_poll()
983 spin_unlock_irqrestore(&uap->port.lock, flags); in pl011_dma_rx_poll()
985 uap->dmarx.running = false; in pl011_dma_rx_poll()
987 del_timer(&uap->dmarx.timer); in pl011_dma_rx_poll()
989 mod_timer(&uap->dmarx.timer, in pl011_dma_rx_poll()
990 jiffies + msecs_to_jiffies(uap->dmarx.poll_rate)); in pl011_dma_rx_poll()
994 static void pl011_dma_startup(struct uart_amba_port *uap) in pl011_dma_startup() argument
998 if (!uap->dma_probed) in pl011_dma_startup()
999 pl011_dma_probe(uap); in pl011_dma_startup()
1001 if (!uap->dmatx.chan) in pl011_dma_startup()
1004 uap->dmatx.buf = kmalloc(PL011_DMA_BUFFER_SIZE, GFP_KERNEL | __GFP_DMA); in pl011_dma_startup()
1005 if (!uap->dmatx.buf) { in pl011_dma_startup()
1006 dev_err(uap->port.dev, "no memory for DMA TX buffer\n"); in pl011_dma_startup()
1007 uap->port.fifosize = uap->fifosize; in pl011_dma_startup()
1011 sg_init_one(&uap->dmatx.sg, uap->dmatx.buf, PL011_DMA_BUFFER_SIZE); in pl011_dma_startup()
1014 uap->port.fifosize = PL011_DMA_BUFFER_SIZE; in pl011_dma_startup()
1015 uap->using_tx_dma = true; in pl011_dma_startup()
1017 if (!uap->dmarx.chan) in pl011_dma_startup()
1021 ret = pl011_sgbuf_init(uap->dmarx.chan, &uap->dmarx.sgbuf_a, in pl011_dma_startup()
1024 dev_err(uap->port.dev, "failed to init DMA %s: %d\n", in pl011_dma_startup()
1029 ret = pl011_sgbuf_init(uap->dmarx.chan, &uap->dmarx.sgbuf_b, in pl011_dma_startup()
1032 dev_err(uap->port.dev, "failed to init DMA %s: %d\n", in pl011_dma_startup()
1034 pl011_sgbuf_free(uap->dmarx.chan, &uap->dmarx.sgbuf_a, in pl011_dma_startup()
1039 uap->using_rx_dma = true; in pl011_dma_startup()
1043 uap->dmacr |= UART011_DMAONERR; in pl011_dma_startup()
1044 writew(uap->dmacr, uap->port.membase + UART011_DMACR); in pl011_dma_startup()
1051 if (uap->vendor->dma_threshold) in pl011_dma_startup()
1053 uap->port.membase + ST_UART011_DMAWM); in pl011_dma_startup()
1055 if (uap->using_rx_dma) { in pl011_dma_startup()
1056 if (pl011_dma_rx_trigger_dma(uap)) in pl011_dma_startup()
1057 dev_dbg(uap->port.dev, "could not trigger initial " in pl011_dma_startup()
1059 if (uap->dmarx.poll_rate) { in pl011_dma_startup()
1060 init_timer(&(uap->dmarx.timer)); in pl011_dma_startup()
1061 uap->dmarx.timer.function = pl011_dma_rx_poll; in pl011_dma_startup()
1062 uap->dmarx.timer.data = (unsigned long)uap; in pl011_dma_startup()
1063 mod_timer(&uap->dmarx.timer, in pl011_dma_startup()
1065 msecs_to_jiffies(uap->dmarx.poll_rate)); in pl011_dma_startup()
1066 uap->dmarx.last_residue = PL011_DMA_BUFFER_SIZE; in pl011_dma_startup()
1067 uap->dmarx.last_jiffies = jiffies; in pl011_dma_startup()
1072 static void pl011_dma_shutdown(struct uart_amba_port *uap) in pl011_dma_shutdown() argument
1074 if (!(uap->using_tx_dma || uap->using_rx_dma)) in pl011_dma_shutdown()
1078 while (readw(uap->port.membase + UART01x_FR) & UART01x_FR_BUSY) in pl011_dma_shutdown()
1081 spin_lock_irq(&uap->port.lock); in pl011_dma_shutdown()
1082 uap->dmacr &= ~(UART011_DMAONERR | UART011_RXDMAE | UART011_TXDMAE); in pl011_dma_shutdown()
1083 writew(uap->dmacr, uap->port.membase + UART011_DMACR); in pl011_dma_shutdown()
1084 spin_unlock_irq(&uap->port.lock); in pl011_dma_shutdown()
1086 if (uap->using_tx_dma) { in pl011_dma_shutdown()
1088 dmaengine_terminate_all(uap->dmatx.chan); in pl011_dma_shutdown()
1089 if (uap->dmatx.queued) { in pl011_dma_shutdown()
1090 dma_unmap_sg(uap->dmatx.chan->device->dev, &uap->dmatx.sg, 1, in pl011_dma_shutdown()
1092 uap->dmatx.queued = false; in pl011_dma_shutdown()
1095 kfree(uap->dmatx.buf); in pl011_dma_shutdown()
1096 uap->using_tx_dma = false; in pl011_dma_shutdown()
1099 if (uap->using_rx_dma) { in pl011_dma_shutdown()
1100 dmaengine_terminate_all(uap->dmarx.chan); in pl011_dma_shutdown()
1102 pl011_sgbuf_free(uap->dmarx.chan, &uap->dmarx.sgbuf_a, DMA_FROM_DEVICE); in pl011_dma_shutdown()
1103 pl011_sgbuf_free(uap->dmarx.chan, &uap->dmarx.sgbuf_b, DMA_FROM_DEVICE); in pl011_dma_shutdown()
1104 if (uap->dmarx.poll_rate) in pl011_dma_shutdown()
1105 del_timer_sync(&uap->dmarx.timer); in pl011_dma_shutdown()
1106 uap->using_rx_dma = false; in pl011_dma_shutdown()
1110 static inline bool pl011_dma_rx_available(struct uart_amba_port *uap) in pl011_dma_rx_available() argument
1112 return uap->using_rx_dma; in pl011_dma_rx_available()
1115 static inline bool pl011_dma_rx_running(struct uart_amba_port *uap) in pl011_dma_rx_running() argument
1117 return uap->using_rx_dma && uap->dmarx.running; in pl011_dma_rx_running()
1122 static inline void pl011_dma_probe(struct uart_amba_port *uap) in pl011_dma_probe() argument
1126 static inline void pl011_dma_remove(struct uart_amba_port *uap) in pl011_dma_remove() argument
1130 static inline void pl011_dma_startup(struct uart_amba_port *uap) in pl011_dma_startup() argument
1134 static inline void pl011_dma_shutdown(struct uart_amba_port *uap) in pl011_dma_shutdown() argument
1138 static inline bool pl011_dma_tx_irq(struct uart_amba_port *uap) in pl011_dma_tx_irq() argument
1143 static inline void pl011_dma_tx_stop(struct uart_amba_port *uap) in pl011_dma_tx_stop() argument
1147 static inline bool pl011_dma_tx_start(struct uart_amba_port *uap) in pl011_dma_tx_start() argument
1152 static inline void pl011_dma_rx_irq(struct uart_amba_port *uap) in pl011_dma_rx_irq() argument
1156 static inline void pl011_dma_rx_stop(struct uart_amba_port *uap) in pl011_dma_rx_stop() argument
1160 static inline int pl011_dma_rx_trigger_dma(struct uart_amba_port *uap) in pl011_dma_rx_trigger_dma() argument
1165 static inline bool pl011_dma_rx_available(struct uart_amba_port *uap) in pl011_dma_rx_available() argument
1170 static inline bool pl011_dma_rx_running(struct uart_amba_port *uap) in pl011_dma_rx_running() argument
1180 struct uart_amba_port *uap = in pl011_stop_tx() local
1183 uap->im &= ~UART011_TXIM; in pl011_stop_tx()
1184 writew(uap->im, uap->port.membase + UART011_IMSC); in pl011_stop_tx()
1185 pl011_dma_tx_stop(uap); in pl011_stop_tx()
1188 static void pl011_tx_chars(struct uart_amba_port *uap, bool from_irq);
1191 static void pl011_start_tx_pio(struct uart_amba_port *uap) in pl011_start_tx_pio() argument
1193 uap->im |= UART011_TXIM; in pl011_start_tx_pio()
1194 writew(uap->im, uap->port.membase + UART011_IMSC); in pl011_start_tx_pio()
1195 pl011_tx_chars(uap, false); in pl011_start_tx_pio()
1200 struct uart_amba_port *uap = in pl011_start_tx() local
1203 if (!pl011_dma_tx_start(uap)) in pl011_start_tx()
1204 pl011_start_tx_pio(uap); in pl011_start_tx()
1209 struct uart_amba_port *uap = in pl011_stop_rx() local
1212 uap->im &= ~(UART011_RXIM|UART011_RTIM|UART011_FEIM| in pl011_stop_rx()
1214 writew(uap->im, uap->port.membase + UART011_IMSC); in pl011_stop_rx()
1216 pl011_dma_rx_stop(uap); in pl011_stop_rx()
1221 struct uart_amba_port *uap = in pl011_enable_ms() local
1224 uap->im |= UART011_RIMIM|UART011_CTSMIM|UART011_DCDMIM|UART011_DSRMIM; in pl011_enable_ms()
1225 writew(uap->im, uap->port.membase + UART011_IMSC); in pl011_enable_ms()
1228 static void pl011_rx_chars(struct uart_amba_port *uap) in pl011_rx_chars() argument
1229 __releases(&uap->port.lock) in pl011_rx_chars()
1230 __acquires(&uap->port.lock) in pl011_rx_chars()
1232 pl011_fifo_to_tty(uap); in pl011_rx_chars()
1234 spin_unlock(&uap->port.lock); in pl011_rx_chars()
1235 tty_flip_buffer_push(&uap->port.state->port); in pl011_rx_chars()
1240 if (pl011_dma_rx_available(uap)) { in pl011_rx_chars()
1241 if (pl011_dma_rx_trigger_dma(uap)) { in pl011_rx_chars()
1242 dev_dbg(uap->port.dev, "could not trigger RX DMA job " in pl011_rx_chars()
1244 uap->im |= UART011_RXIM; in pl011_rx_chars()
1245 writew(uap->im, uap->port.membase + UART011_IMSC); in pl011_rx_chars()
1249 if (uap->dmarx.poll_rate) { in pl011_rx_chars()
1250 uap->dmarx.last_jiffies = jiffies; in pl011_rx_chars()
1251 uap->dmarx.last_residue = PL011_DMA_BUFFER_SIZE; in pl011_rx_chars()
1252 mod_timer(&uap->dmarx.timer, in pl011_rx_chars()
1254 msecs_to_jiffies(uap->dmarx.poll_rate)); in pl011_rx_chars()
1259 spin_lock(&uap->port.lock); in pl011_rx_chars()
1262 static bool pl011_tx_char(struct uart_amba_port *uap, unsigned char c, in pl011_tx_char() argument
1266 readw(uap->port.membase + UART01x_FR) & UART01x_FR_TXFF) in pl011_tx_char()
1269 writew(c, uap->port.membase + UART01x_DR); in pl011_tx_char()
1270 uap->port.icount.tx++; in pl011_tx_char()
1275 static void pl011_tx_chars(struct uart_amba_port *uap, bool from_irq) in pl011_tx_chars() argument
1277 struct circ_buf *xmit = &uap->port.state->xmit; in pl011_tx_chars()
1278 int count = uap->fifosize >> 1; in pl011_tx_chars()
1280 if (uap->port.x_char) { in pl011_tx_chars()
1281 if (!pl011_tx_char(uap, uap->port.x_char, from_irq)) in pl011_tx_chars()
1283 uap->port.x_char = 0; in pl011_tx_chars()
1286 if (uart_circ_empty(xmit) || uart_tx_stopped(&uap->port)) { in pl011_tx_chars()
1287 pl011_stop_tx(&uap->port); in pl011_tx_chars()
1292 if (pl011_dma_tx_irq(uap)) in pl011_tx_chars()
1299 if (!pl011_tx_char(uap, xmit->buf[xmit->tail], from_irq)) in pl011_tx_chars()
1306 uart_write_wakeup(&uap->port); in pl011_tx_chars()
1309 pl011_stop_tx(&uap->port); in pl011_tx_chars()
1312 static void pl011_modem_status(struct uart_amba_port *uap) in pl011_modem_status() argument
1316 status = readw(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY; in pl011_modem_status()
1318 delta = status ^ uap->old_status; in pl011_modem_status()
1319 uap->old_status = status; in pl011_modem_status()
1325 uart_handle_dcd_change(&uap->port, status & UART01x_FR_DCD); in pl011_modem_status()
1328 uap->port.icount.dsr++; in pl011_modem_status()
1331 uart_handle_cts_change(&uap->port, status & UART01x_FR_CTS); in pl011_modem_status()
1333 wake_up_interruptible(&uap->port.state->port.delta_msr_wait); in pl011_modem_status()
1336 static void check_apply_cts_event_workaround(struct uart_amba_port *uap) in check_apply_cts_event_workaround() argument
1340 if (!uap->vendor->cts_event_workaround) in check_apply_cts_event_workaround()
1344 writew(0x00, uap->port.membase + UART011_ICR); in check_apply_cts_event_workaround()
1351 dummy_read = readw(uap->port.membase + UART011_ICR); in check_apply_cts_event_workaround()
1352 dummy_read = readw(uap->port.membase + UART011_ICR); in check_apply_cts_event_workaround()
1357 struct uart_amba_port *uap = dev_id; in pl011_int() local
1363 spin_lock_irqsave(&uap->port.lock, flags); in pl011_int()
1364 imsc = readw(uap->port.membase + UART011_IMSC); in pl011_int()
1365 status = readw(uap->port.membase + UART011_RIS) & imsc; in pl011_int()
1368 check_apply_cts_event_workaround(uap); in pl011_int()
1372 uap->port.membase + UART011_ICR); in pl011_int()
1375 if (pl011_dma_rx_running(uap)) in pl011_int()
1376 pl011_dma_rx_irq(uap); in pl011_int()
1378 pl011_rx_chars(uap); in pl011_int()
1382 pl011_modem_status(uap); in pl011_int()
1384 pl011_tx_chars(uap, true); in pl011_int()
1389 status = readw(uap->port.membase + UART011_RIS) & imsc; in pl011_int()
1394 spin_unlock_irqrestore(&uap->port.lock, flags); in pl011_int()
1401 struct uart_amba_port *uap = in pl011_tx_empty() local
1403 unsigned int status = readw(uap->port.membase + UART01x_FR); in pl011_tx_empty()
1409 struct uart_amba_port *uap = in pl011_get_mctrl() local
1412 unsigned int status = readw(uap->port.membase + UART01x_FR); in pl011_get_mctrl()
1428 struct uart_amba_port *uap = in pl011_set_mctrl() local
1432 cr = readw(uap->port.membase + UART011_CR); in pl011_set_mctrl()
1446 if (uap->autorts) { in pl011_set_mctrl()
1452 writew(cr, uap->port.membase + UART011_CR); in pl011_set_mctrl()
1457 struct uart_amba_port *uap = in pl011_break_ctl() local
1462 spin_lock_irqsave(&uap->port.lock, flags); in pl011_break_ctl()
1463 lcr_h = readw(uap->port.membase + uap->lcrh_tx); in pl011_break_ctl()
1468 writew(lcr_h, uap->port.membase + uap->lcrh_tx); in pl011_break_ctl()
1469 spin_unlock_irqrestore(&uap->port.lock, flags); in pl011_break_ctl()
1476 struct uart_amba_port *uap = in pl011_quiesce_irqs() local
1478 unsigned char __iomem *regs = uap->port.membase; in pl011_quiesce_irqs()
1499 struct uart_amba_port *uap = in pl011_get_poll_char() local
1509 status = readw(uap->port.membase + UART01x_FR); in pl011_get_poll_char()
1513 return readw(uap->port.membase + UART01x_DR); in pl011_get_poll_char()
1519 struct uart_amba_port *uap = in pl011_put_poll_char() local
1522 while (readw(uap->port.membase + UART01x_FR) & UART01x_FR_TXFF) in pl011_put_poll_char()
1525 writew(ch, uap->port.membase + UART01x_DR); in pl011_put_poll_char()
1532 struct uart_amba_port *uap = in pl011_hwinit() local
1542 retval = clk_prepare_enable(uap->clk); in pl011_hwinit()
1546 uap->port.uartclk = clk_get_rate(uap->clk); in pl011_hwinit()
1550 UART011_RTIS | UART011_RXIS, uap->port.membase + UART011_ICR); in pl011_hwinit()
1556 uap->im = readw(uap->port.membase + UART011_IMSC); in pl011_hwinit()
1557 writew(UART011_RTIM | UART011_RXIM, uap->port.membase + UART011_IMSC); in pl011_hwinit()
1559 if (dev_get_platdata(uap->port.dev)) { in pl011_hwinit()
1562 plat = dev_get_platdata(uap->port.dev); in pl011_hwinit()
1569 static void pl011_write_lcr_h(struct uart_amba_port *uap, unsigned int lcr_h) in pl011_write_lcr_h() argument
1571 writew(lcr_h, uap->port.membase + uap->lcrh_rx); in pl011_write_lcr_h()
1572 if (uap->lcrh_rx != uap->lcrh_tx) { in pl011_write_lcr_h()
1579 writew(0xff, uap->port.membase + UART011_MIS); in pl011_write_lcr_h()
1580 writew(lcr_h, uap->port.membase + uap->lcrh_tx); in pl011_write_lcr_h()
1584 static int pl011_allocate_irq(struct uart_amba_port *uap) in pl011_allocate_irq() argument
1586 writew(uap->im, uap->port.membase + UART011_IMSC); in pl011_allocate_irq()
1588 return request_irq(uap->port.irq, pl011_int, 0, "uart-pl011", uap); in pl011_allocate_irq()
1596 static void pl011_enable_interrupts(struct uart_amba_port *uap) in pl011_enable_interrupts() argument
1598 spin_lock_irq(&uap->port.lock); in pl011_enable_interrupts()
1602 uap->port.membase + UART011_ICR); in pl011_enable_interrupts()
1603 uap->im = UART011_RTIM; in pl011_enable_interrupts()
1604 if (!pl011_dma_rx_running(uap)) in pl011_enable_interrupts()
1605 uap->im |= UART011_RXIM; in pl011_enable_interrupts()
1606 writew(uap->im, uap->port.membase + UART011_IMSC); in pl011_enable_interrupts()
1607 spin_unlock_irq(&uap->port.lock); in pl011_enable_interrupts()
1612 struct uart_amba_port *uap = in pl011_startup() local
1621 retval = pl011_allocate_irq(uap); in pl011_startup()
1625 writew(uap->vendor->ifls, uap->port.membase + UART011_IFLS); in pl011_startup()
1627 spin_lock_irq(&uap->port.lock); in pl011_startup()
1630 cr = uap->old_cr & (UART011_CR_RTS | UART011_CR_DTR); in pl011_startup()
1632 writew(cr, uap->port.membase + UART011_CR); in pl011_startup()
1634 spin_unlock_irq(&uap->port.lock); in pl011_startup()
1639 uap->old_status = readw(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY; in pl011_startup()
1642 pl011_dma_startup(uap); in pl011_startup()
1644 pl011_enable_interrupts(uap); in pl011_startup()
1649 clk_disable_unprepare(uap->clk); in pl011_startup()
1655 struct uart_amba_port *uap = in sbsa_uart_startup() local
1663 retval = pl011_allocate_irq(uap); in sbsa_uart_startup()
1668 uap->old_status = 0; in sbsa_uart_startup()
1670 pl011_enable_interrupts(uap); in sbsa_uart_startup()
1675 static void pl011_shutdown_channel(struct uart_amba_port *uap, in pl011_shutdown_channel() argument
1680 val = readw(uap->port.membase + lcrh); in pl011_shutdown_channel()
1682 writew(val, uap->port.membase + lcrh); in pl011_shutdown_channel()
1690 static void pl011_disable_uart(struct uart_amba_port *uap) in pl011_disable_uart() argument
1694 uap->autorts = false; in pl011_disable_uart()
1695 spin_lock_irq(&uap->port.lock); in pl011_disable_uart()
1696 cr = readw(uap->port.membase + UART011_CR); in pl011_disable_uart()
1697 uap->old_cr = cr; in pl011_disable_uart()
1700 writew(cr, uap->port.membase + UART011_CR); in pl011_disable_uart()
1701 spin_unlock_irq(&uap->port.lock); in pl011_disable_uart()
1706 pl011_shutdown_channel(uap, uap->lcrh_rx); in pl011_disable_uart()
1707 if (uap->lcrh_rx != uap->lcrh_tx) in pl011_disable_uart()
1708 pl011_shutdown_channel(uap, uap->lcrh_tx); in pl011_disable_uart()
1711 static void pl011_disable_interrupts(struct uart_amba_port *uap) in pl011_disable_interrupts() argument
1713 spin_lock_irq(&uap->port.lock); in pl011_disable_interrupts()
1716 uap->im = 0; in pl011_disable_interrupts()
1717 writew(uap->im, uap->port.membase + UART011_IMSC); in pl011_disable_interrupts()
1718 writew(0xffff, uap->port.membase + UART011_ICR); in pl011_disable_interrupts()
1720 spin_unlock_irq(&uap->port.lock); in pl011_disable_interrupts()
1725 struct uart_amba_port *uap = in pl011_shutdown() local
1728 pl011_disable_interrupts(uap); in pl011_shutdown()
1730 pl011_dma_shutdown(uap); in pl011_shutdown()
1732 free_irq(uap->port.irq, uap); in pl011_shutdown()
1734 pl011_disable_uart(uap); in pl011_shutdown()
1739 clk_disable_unprepare(uap->clk); in pl011_shutdown()
1743 if (dev_get_platdata(uap->port.dev)) { in pl011_shutdown()
1746 plat = dev_get_platdata(uap->port.dev); in pl011_shutdown()
1751 if (uap->port.ops->flush_buffer) in pl011_shutdown()
1752 uap->port.ops->flush_buffer(port); in pl011_shutdown()
1757 struct uart_amba_port *uap = in sbsa_uart_shutdown() local
1760 pl011_disable_interrupts(uap); in sbsa_uart_shutdown()
1762 free_irq(uap->port.irq, uap); in sbsa_uart_shutdown()
1764 if (uap->port.ops->flush_buffer) in sbsa_uart_shutdown()
1765 uap->port.ops->flush_buffer(port); in sbsa_uart_shutdown()
1804 struct uart_amba_port *uap = in pl011_set_termios() local
1810 if (uap->vendor->oversampling) in pl011_set_termios()
1824 if (uap->dmarx.auto_poll_rate) in pl011_set_termios()
1825 uap->dmarx.poll_rate = DIV_ROUND_UP(10000000, baud); in pl011_set_termios()
1854 if (uap->fifosize > 1) in pl011_set_termios()
1878 uap->autorts = true; in pl011_set_termios()
1881 uap->autorts = false; in pl011_set_termios()
1884 if (uap->vendor->oversampling) { in pl011_set_termios()
1897 if (uap->vendor->oversampling) { in pl011_set_termios()
1913 pl011_write_lcr_h(uap, lcr_h); in pl011_set_termios()
1923 struct uart_amba_port *uap = in sbsa_uart_set_termios() local
1927 tty_termios_encode_baud_rate(termios, uap->fixed_baud, uap->fixed_baud); in sbsa_uart_set_termios()
1935 uart_update_timeout(port, CS8, uap->fixed_baud); in sbsa_uart_set_termios()
1942 struct uart_amba_port *uap = in pl011_type() local
1944 return uap->port.type == PORT_AMBA ? uap->type : NULL; in pl011_type()
2052 struct uart_amba_port *uap = in pl011_console_putchar() local
2055 while (readw(uap->port.membase + UART01x_FR) & UART01x_FR_TXFF) in pl011_console_putchar()
2057 writew(ch, uap->port.membase + UART01x_DR); in pl011_console_putchar()
2063 struct uart_amba_port *uap = amba_ports[co->index]; in pl011_console_write() local
2068 clk_enable(uap->clk); in pl011_console_write()
2071 if (uap->port.sysrq) in pl011_console_write()
2074 locked = spin_trylock(&uap->port.lock); in pl011_console_write()
2076 spin_lock(&uap->port.lock); in pl011_console_write()
2081 if (!uap->vendor->always_enabled) { in pl011_console_write()
2082 old_cr = readw(uap->port.membase + UART011_CR); in pl011_console_write()
2085 writew(new_cr, uap->port.membase + UART011_CR); in pl011_console_write()
2088 uart_console_write(&uap->port, s, count, pl011_console_putchar); in pl011_console_write()
2095 status = readw(uap->port.membase + UART01x_FR); in pl011_console_write()
2097 if (!uap->vendor->always_enabled) in pl011_console_write()
2098 writew(old_cr, uap->port.membase + UART011_CR); in pl011_console_write()
2101 spin_unlock(&uap->port.lock); in pl011_console_write()
2104 clk_disable(uap->clk); in pl011_console_write()
2108 pl011_console_get_options(struct uart_amba_port *uap, int *baud, in pl011_console_get_options() argument
2111 if (readw(uap->port.membase + UART011_CR) & UART01x_CR_UARTEN) { in pl011_console_get_options()
2114 lcr_h = readw(uap->port.membase + uap->lcrh_tx); in pl011_console_get_options()
2129 ibrd = readw(uap->port.membase + UART011_IBRD); in pl011_console_get_options()
2130 fbrd = readw(uap->port.membase + UART011_FBRD); in pl011_console_get_options()
2132 *baud = uap->port.uartclk * 4 / (64 * ibrd + fbrd); in pl011_console_get_options()
2134 if (uap->vendor->oversampling) { in pl011_console_get_options()
2135 if (readw(uap->port.membase + UART011_CR) in pl011_console_get_options()
2144 struct uart_amba_port *uap; in pl011_console_setup() local
2158 uap = amba_ports[co->index]; in pl011_console_setup()
2159 if (!uap) in pl011_console_setup()
2163 pinctrl_pm_select_default_state(uap->port.dev); in pl011_console_setup()
2165 ret = clk_prepare(uap->clk); in pl011_console_setup()
2169 if (dev_get_platdata(uap->port.dev)) { in pl011_console_setup()
2172 plat = dev_get_platdata(uap->port.dev); in pl011_console_setup()
2177 uap->port.uartclk = clk_get_rate(uap->clk); in pl011_console_setup()
2179 if (uap->vendor->fixed_options) { in pl011_console_setup()
2180 baud = uap->fixed_baud; in pl011_console_setup()
2186 pl011_console_get_options(uap, &baud, &parity, &bits); in pl011_console_setup()
2189 return uart_set_options(&uap->port, co, baud, parity, bits, flow); in pl011_console_setup()
2280 static void pl011_unregister_port(struct uart_amba_port *uap) in pl011_unregister_port() argument
2286 if (amba_ports[i] == uap) in pl011_unregister_port()
2291 pl011_dma_remove(uap); in pl011_unregister_port()
2307 static int pl011_setup_port(struct device *dev, struct uart_amba_port *uap, in pl011_setup_port() argument
2318 uap->old_cr = 0; in pl011_setup_port()
2319 uap->port.dev = dev; in pl011_setup_port()
2320 uap->port.mapbase = mmiobase->start; in pl011_setup_port()
2321 uap->port.membase = base; in pl011_setup_port()
2322 uap->port.iotype = UPIO_MEM; in pl011_setup_port()
2323 uap->port.fifosize = uap->fifosize; in pl011_setup_port()
2324 uap->port.flags = UPF_BOOT_AUTOCONF; in pl011_setup_port()
2325 uap->port.line = index; in pl011_setup_port()
2327 amba_ports[index] = uap; in pl011_setup_port()
2332 static int pl011_register_port(struct uart_amba_port *uap) in pl011_register_port() argument
2337 writew(0, uap->port.membase + UART011_IMSC); in pl011_register_port()
2338 writew(0xffff, uap->port.membase + UART011_ICR); in pl011_register_port()
2343 dev_err(uap->port.dev, in pl011_register_port()
2349 ret = uart_add_one_port(&amba_reg, &uap->port); in pl011_register_port()
2351 pl011_unregister_port(uap); in pl011_register_port()
2358 struct uart_amba_port *uap; in pl011_probe() local
2366 uap = devm_kzalloc(&dev->dev, sizeof(struct uart_amba_port), in pl011_probe()
2368 if (!uap) in pl011_probe()
2371 uap->clk = devm_clk_get(&dev->dev, NULL); in pl011_probe()
2372 if (IS_ERR(uap->clk)) in pl011_probe()
2373 return PTR_ERR(uap->clk); in pl011_probe()
2375 uap->vendor = vendor; in pl011_probe()
2376 uap->lcrh_rx = vendor->lcrh_rx; in pl011_probe()
2377 uap->lcrh_tx = vendor->lcrh_tx; in pl011_probe()
2378 uap->fifosize = vendor->get_fifosize(dev); in pl011_probe()
2379 uap->port.irq = dev->irq[0]; in pl011_probe()
2380 uap->port.ops = &amba_pl011_pops; in pl011_probe()
2382 snprintf(uap->type, sizeof(uap->type), "PL011 rev%u", amba_rev(dev)); in pl011_probe()
2384 ret = pl011_setup_port(&dev->dev, uap, &dev->res, portnr); in pl011_probe()
2388 amba_set_drvdata(dev, uap); in pl011_probe()
2390 return pl011_register_port(uap); in pl011_probe()
2395 struct uart_amba_port *uap = amba_get_drvdata(dev); in pl011_remove() local
2397 uart_remove_one_port(&amba_reg, &uap->port); in pl011_remove()
2398 pl011_unregister_port(uap); in pl011_remove()
2405 struct uart_amba_port *uap = dev_get_drvdata(dev); in pl011_suspend() local
2407 if (!uap) in pl011_suspend()
2410 return uart_suspend_port(&amba_reg, &uap->port); in pl011_suspend()
2415 struct uart_amba_port *uap = dev_get_drvdata(dev); in pl011_resume() local
2417 if (!uap) in pl011_resume()
2420 return uart_resume_port(&amba_reg, &uap->port); in pl011_resume()
2428 struct uart_amba_port *uap; in sbsa_uart_probe() local
2451 uap = devm_kzalloc(&pdev->dev, sizeof(struct uart_amba_port), in sbsa_uart_probe()
2453 if (!uap) in sbsa_uart_probe()
2456 uap->vendor = &vendor_sbsa; in sbsa_uart_probe()
2457 uap->fifosize = 32; in sbsa_uart_probe()
2458 uap->port.irq = platform_get_irq(pdev, 0); in sbsa_uart_probe()
2459 uap->port.ops = &sbsa_uart_pops; in sbsa_uart_probe()
2460 uap->fixed_baud = baudrate; in sbsa_uart_probe()
2462 snprintf(uap->type, sizeof(uap->type), "SBSA"); in sbsa_uart_probe()
2466 ret = pl011_setup_port(&pdev->dev, uap, r, portnr); in sbsa_uart_probe()
2470 platform_set_drvdata(pdev, uap); in sbsa_uart_probe()
2472 return pl011_register_port(uap); in sbsa_uart_probe()
2477 struct uart_amba_port *uap = platform_get_drvdata(pdev); in sbsa_uart_remove() local
2479 uart_remove_one_port(&amba_reg, &uap->port); in sbsa_uart_remove()
2480 pl011_unregister_port(uap); in sbsa_uart_remove()