168 	unsigned int		im;		/* interrupt mask */  member
592 		uap->im &= ~UART011_TXIM;  in pl011_dma_tx_irq()
593 		writew(uap->im, uap->port.membase + UART011_IMSC);  in pl011_dma_tx_irq()
602 		uap->im &= ~UART011_TXIM;  in pl011_dma_tx_irq()
603 		writew(uap->im, uap->port.membase + UART011_IMSC);  in pl011_dma_tx_irq()
642 				uap->im &= ~UART011_TXIM;  in pl011_dma_tx_start()
643 				writew(uap->im, uap->port.membase +  in pl011_dma_tx_start()
749 	uap->im &= ~UART011_RXIM;  in pl011_dma_rx_trigger_dma()
750 	writew(uap->im, uap->port.membase + UART011_IMSC);  in pl011_dma_rx_trigger_dma()
876 		uap->im |= UART011_RXIM;  in pl011_dma_rx_irq()
877 		writew(uap->im, uap->port.membase + UART011_IMSC);  in pl011_dma_rx_irq()
924 		uap->im |= UART011_RXIM;  in pl011_dma_rx_callback()
925 		writew(uap->im, uap->port.membase + UART011_IMSC);  in pl011_dma_rx_callback()
981 		uap->im |= UART011_RXIM;  in pl011_dma_rx_poll()
982 		writew(uap->im, uap->port.membase + UART011_IMSC);  in pl011_dma_rx_poll()
1183 	uap->im &= ~UART011_TXIM;  in pl011_stop_tx()
1184 	writew(uap->im, uap->port.membase + UART011_IMSC);  in pl011_stop_tx()
1193 	uap->im |= UART011_TXIM;  in pl011_start_tx_pio()
1194 	writew(uap->im, uap->port.membase + UART011_IMSC);  in pl011_start_tx_pio()
1212 	uap->im &= ~(UART011_RXIM|UART011_RTIM|UART011_FEIM|  in pl011_stop_rx()
1214 	writew(uap->im, uap->port.membase + UART011_IMSC);  in pl011_stop_rx()
1224 	uap->im |= UART011_RIMIM|UART011_CTSMIM|UART011_DCDMIM|UART011_DSRMIM;  in pl011_enable_ms()
1225 	writew(uap->im, uap->port.membase + UART011_IMSC);  in pl011_enable_ms()
1244 			uap->im |= UART011_RXIM;  in pl011_rx_chars()
1245 			writew(uap->im, uap->port.membase + UART011_IMSC);  in pl011_rx_chars()
1556 	uap->im = readw(uap->port.membase + UART011_IMSC);  in pl011_hwinit()
1586 	writew(uap->im, uap->port.membase + UART011_IMSC);  in pl011_allocate_irq()
1603 	uap->im = UART011_RTIM;  in pl011_enable_interrupts()
1605 		uap->im |= UART011_RXIM;  in pl011_enable_interrupts()
1606 	writew(uap->im, uap->port.membase + UART011_IMSC);  in pl011_enable_interrupts()
1716 	uap->im = 0;  in pl011_disable_interrupts()
1717 	writew(uap->im, uap->port.membase + UART011_IMSC);  in pl011_disable_interrupts()