593 		writew(uap->im, uap->port.membase + UART011_IMSC);  in pl011_dma_tx_irq()
603 		writew(uap->im, uap->port.membase + UART011_IMSC);  in pl011_dma_tx_irq()
644 				       UART011_IMSC);  in pl011_dma_tx_start()
750 	writew(uap->im, uap->port.membase + UART011_IMSC);  in pl011_dma_rx_trigger_dma()
877 		writew(uap->im, uap->port.membase + UART011_IMSC);  in pl011_dma_rx_irq()
925 		writew(uap->im, uap->port.membase + UART011_IMSC);  in pl011_dma_rx_callback()
982 		writew(uap->im, uap->port.membase + UART011_IMSC);  in pl011_dma_rx_poll()
1184 	writew(uap->im, uap->port.membase + UART011_IMSC);  in pl011_stop_tx()
1194 	writew(uap->im, uap->port.membase + UART011_IMSC);  in pl011_start_tx_pio()
1214 	writew(uap->im, uap->port.membase + UART011_IMSC);  in pl011_stop_rx()
1225 	writew(uap->im, uap->port.membase + UART011_IMSC);  in pl011_enable_ms()
1245 			writew(uap->im, uap->port.membase + UART011_IMSC);  in pl011_rx_chars()
1364 	imsc = readw(uap->port.membase + UART011_IMSC);  in pl011_int()
1494 	writew(readw(regs + UART011_IMSC) & ~UART011_TXIM, regs + UART011_IMSC);  in pl011_quiesce_irqs()
1556 	uap->im = readw(uap->port.membase + UART011_IMSC);  in pl011_hwinit()
1557 	writew(UART011_RTIM | UART011_RXIM, uap->port.membase + UART011_IMSC);  in pl011_hwinit()
1586 	writew(uap->im, uap->port.membase + UART011_IMSC);  in pl011_allocate_irq()
1606 	writew(uap->im, uap->port.membase + UART011_IMSC);  in pl011_enable_interrupts()
1717 	writew(uap->im, uap->port.membase + UART011_IMSC);  in pl011_disable_interrupts()
2337 	writew(0, uap->port.membase + UART011_IMSC);  in pl011_register_port()