Lines Matching refs:UART011_DMACR
441 writew(uap->dmacr, uap->port.membase + UART011_DMACR); in pl011_dma_tx_callback()
555 writew(uap->dmacr, uap->port.membase + UART011_DMACR); in pl011_dma_tx_refill()
591 writew(uap->dmacr, uap->port.membase + UART011_DMACR); in pl011_dma_tx_irq()
617 writew(uap->dmacr, uap->port.membase + UART011_DMACR); in pl011_dma_tx_stop()
650 uap->port.membase + UART011_DMACR); in pl011_dma_tx_start()
661 writew(uap->dmacr, uap->port.membase + UART011_DMACR); in pl011_dma_tx_start()
678 writew(dmacr, uap->port.membase + UART011_DMACR); in pl011_dma_tx_start()
706 writew(uap->dmacr, uap->port.membase + UART011_DMACR); in pl011_dma_flush_buffer()
746 writew(uap->dmacr, uap->port.membase + UART011_DMACR); in pl011_dma_rx_trigger_dma()
857 writew(uap->dmacr, uap->port.membase + UART011_DMACR); in pl011_dma_rx_irq()
938 writew(uap->dmacr, uap->port.membase + UART011_DMACR); in pl011_dma_rx_stop()
1044 writew(uap->dmacr, uap->port.membase + UART011_DMACR); in pl011_dma_startup()
1083 writew(uap->dmacr, uap->port.membase + UART011_DMACR); in pl011_dma_shutdown()