Lines Matching refs:UART011_CR
1432 cr = readw(uap->port.membase + UART011_CR); in pl011_set_mctrl()
1452 writew(cr, uap->port.membase + UART011_CR); in pl011_set_mctrl()
1632 writew(cr, uap->port.membase + UART011_CR); in pl011_startup()
1696 cr = readw(uap->port.membase + UART011_CR); in pl011_disable_uart()
1700 writew(cr, uap->port.membase + UART011_CR); in pl011_disable_uart()
1870 old_cr = readw(port->membase + UART011_CR); in pl011_set_termios()
1871 writew(0, port->membase + UART011_CR); in pl011_set_termios()
1914 writew(old_cr, port->membase + UART011_CR); in pl011_set_termios()
2082 old_cr = readw(uap->port.membase + UART011_CR); in pl011_console_write()
2085 writew(new_cr, uap->port.membase + UART011_CR); in pl011_console_write()
2098 writew(old_cr, uap->port.membase + UART011_CR); in pl011_console_write()
2111 if (readw(uap->port.membase + UART011_CR) & UART01x_CR_UARTEN) { in pl011_console_get_options()
2135 if (readw(uap->port.membase + UART011_CR) in pl011_console_get_options()