Lines Matching refs:port

53 static uint8_t __init early_in(struct uart_port *port, int offset)  in early_in()  argument
55 return readl(port->membase + (offset << 2)); in early_in()
58 static void __init early_out(struct uart_port *port, int offset, uint8_t value) in early_out() argument
60 writel(value, port->membase + (offset << 2)); in early_out()
63 static void __init ingenic_early_console_putc(struct uart_port *port, int c) in ingenic_early_console_putc() argument
68 lsr = early_in(port, UART_LSR); in ingenic_early_console_putc()
71 early_out(port, UART_TX, c); in ingenic_early_console_putc()
77 uart_console_write(&early_device->port, s, count, in ingenic_early_console_write()
95 dev->port.uartclk = be32_to_cpup(prop); in ingenic_early_console_setup_clock()
101 struct uart_port *port = &dev->port; in ingenic_early_console_setup() local
104 if (!dev->port.membase) in ingenic_early_console_setup()
110 divisor = DIV_ROUND_CLOSEST(port->uartclk, 16 * baud); in ingenic_early_console_setup()
112 early_out(port, UART_IER, 0); in ingenic_early_console_setup()
113 early_out(port, UART_LCR, UART_LCR_DLAB | UART_LCR_WLEN8); in ingenic_early_console_setup()
114 early_out(port, UART_DLL, 0); in ingenic_early_console_setup()
115 early_out(port, UART_DLM, 0); in ingenic_early_console_setup()
116 early_out(port, UART_LCR, UART_LCR_WLEN8); in ingenic_early_console_setup()
117 early_out(port, UART_FCR, UART_FCR_UME | UART_FCR_CLEAR_XMIT | in ingenic_early_console_setup()
119 early_out(port, UART_MCR, UART_MCR_RTS | UART_MCR_DTR); in ingenic_early_console_setup()
121 early_out(port, UART_LCR, UART_LCR_DLAB | UART_LCR_WLEN8); in ingenic_early_console_setup()
122 early_out(port, UART_DLL, divisor & 0xff); in ingenic_early_console_setup()
123 early_out(port, UART_DLM, (divisor >> 8) & 0xff); in ingenic_early_console_setup()
124 early_out(port, UART_LCR, UART_LCR_WLEN8); in ingenic_early_console_setup()
226 spin_lock_init(&uart.port.lock); in ingenic_uart_probe()
227 uart.port.type = PORT_16550A; in ingenic_uart_probe()
228 uart.port.flags = UPF_SKIP_TEST | UPF_IOREMAP | UPF_FIXED_TYPE; in ingenic_uart_probe()
229 uart.port.iotype = UPIO_MEM; in ingenic_uart_probe()
230 uart.port.mapbase = regs->start; in ingenic_uart_probe()
231 uart.port.regshift = 2; in ingenic_uart_probe()
232 uart.port.serial_out = ingenic_uart_serial_out; in ingenic_uart_probe()
233 uart.port.serial_in = ingenic_uart_serial_in; in ingenic_uart_probe()
234 uart.port.irq = irq->start; in ingenic_uart_probe()
235 uart.port.dev = &pdev->dev; in ingenic_uart_probe()
236 uart.port.fifosize = cdata->fifosize; in ingenic_uart_probe()
243 uart.port.line = line; in ingenic_uart_probe()
245 uart.port.membase = devm_ioremap(&pdev->dev, regs->start, in ingenic_uart_probe()
247 if (!uart.port.membase) in ingenic_uart_probe()
279 uart.port.uartclk = clk_get_rate(data->clk_baud); in ingenic_uart_probe()