Lines Matching refs:TxControl

359 	Byte_t TxControl[4];  member
383    (ChP)->TxControl[3] &= ~SETBREAK; \
384    out32((ChP)->IndexAddr,(ChP)->TxControl); \
395    (ChP)->TxControl[3] &= ~SET_DTR; \
396    out32((ChP)->IndexAddr,(ChP)->TxControl); \
408    (ChP)->TxControl[3] &= ~SET_RTS; \
409    out32((ChP)->IndexAddr,(ChP)->TxControl); \
482    (ChP)->TxControl[2] &= ~CTSFC_EN; \
483    out32((ChP)->IndexAddr,(ChP)->TxControl); \
508    (ChP)->TxControl[2] &= ~PARITY_EN; \
509    out32((ChP)->IndexAddr,(ChP)->TxControl); \
520    (ChP)->TxControl[2] &= ~RTSTOG_EN; \
521    out32((ChP)->IndexAddr,(ChP)->TxControl); \
560    (ChP)->TxControl[3] &= ~TX_ENABLE; \
561    out32((ChP)->IndexAddr,(ChP)->TxControl); \
597    (ChP)->TxControl[2] |= CTSFC_EN; \
598    out32((ChP)->IndexAddr,(ChP)->TxControl); \
626    (ChP)->TxControl[2] |= PARITY_EN; \
627    out32((ChP)->IndexAddr,(ChP)->TxControl); \
642    (ChP)->TxControl[2] |= RTSTOG_EN; \
643    (ChP)->TxControl[3] &= ~SET_RTS; \
644    out32((ChP)->IndexAddr,(ChP)->TxControl); \
701    (ChP)->TxControl[3] |= TX_ENABLE; \
702    out32((ChP)->IndexAddr,(ChP)->TxControl); \
920    (ChP)->TxControl[3] |= SETBREAK; \
921    out32((ChP)->IndexAddr,(ChP)->TxControl); \
946    (ChP)->TxControl[2] &= ~DATA8BIT; \
947    out32((ChP)->IndexAddr,(ChP)->TxControl); \
958    (ChP)->TxControl[2] |= DATA8BIT; \
959    out32((ChP)->IndexAddr,(ChP)->TxControl); \
970    (ChP)->TxControl[3] |= SET_DTR; \
971    out32((ChP)->IndexAddr,(ChP)->TxControl); \
987    (ChP)->TxControl[2] |= EVEN_PAR; \
988    out32((ChP)->IndexAddr,(ChP)->TxControl); \
1004    (ChP)->TxControl[2] &= ~EVEN_PAR; \
1005    out32((ChP)->IndexAddr,(ChP)->TxControl); \
1017    (ChP)->TxControl[3] |= SET_RTS; \
1018    out32((ChP)->IndexAddr,(ChP)->TxControl); \
1055    (ChP)->TxControl[2] &= ~STOP2; \
1056    out32((ChP)->IndexAddr,(ChP)->TxControl); \
1067    (ChP)->TxControl[2] |= STOP2; \
1068    out32((ChP)->IndexAddr,(ChP)->TxControl); \