439 #define sControllerEOI(CTLP) sOutB((CTLP)->MReg2IO,(CTLP)->MReg2 | INT_STROB)  argument
449 #define sPCIControllerEOI(CTLP) \  argument
451     if ((CTLP)->isUPCI) { \
452 	Word_t w = sInW((CTLP)->PCIIO); \
453 	sOutW((CTLP)->PCIIO, (w ^ PCI_INT_CTRL_AIOP)); \
454 	sOutW((CTLP)->PCIIO, w); \
457 	sOutW((CTLP)->PCIIO, PCI_STROB); \
468 #define sDisAiop(CTLP,AIOPNUM) \  argument
470    (CTLP)->MReg3 &= sBitMapClrTbl[AIOPNUM]; \
471    sOutB((CTLP)->MReg3IO,(CTLP)->MReg3); \
583 #define sEnAiop(CTLP,AIOPNUM) \  argument
585    (CTLP)->MReg3 |= sBitMapSetTbl[AIOPNUM]; \
586    sOutB((CTLP)->MReg3IO,(CTLP)->MReg3); \
727 #define sGetAiopIntStatus(CTLP,AIOPNUM) sInB((CTLP)->AiopIntChanIO[AIOPNUM])  argument
737 #define sGetAiopNumChan(CTLP,AIOPNUM) (CTLP)->AiopNumChan[AIOPNUM]  argument
832 #define sGetControllerIntStatus(CTLP) (sInB((CTLP)->MReg1IO) & 0x0f)  argument
845 #define sPCIGetControllerIntStatus(CTLP) \  argument
846 	((CTLP)->isUPCI ? \
847 	  (sInW((CTLP)->PCIIO2) & UPCI_AIOP_INTR_BITS) : \
848 	  ((sInW((CTLP)->PCIIO) >> 8) & AIOP_INTR_BITS))
906 #define sResetAiopByNum(CTLP,AIOPNUM) \  argument
908    sOutB((CTLP)->AiopIO[(AIOPNUM)]+_CMD_REG,RESET_ALL); \
909    sOutB((CTLP)->AiopIO[(AIOPNUM)]+_CMD_REG,0x0); \