19 static u32 ssb_pcie_read(struct ssb_pcicore *pc, u32 address);
20 static void ssb_pcie_write(struct ssb_pcicore *pc, u32 address, u32 data);
21 static u16 ssb_pcie_mdio_read(struct ssb_pcicore *pc, u8 device, u8 address);
22 static void ssb_pcie_mdio_write(struct ssb_pcicore *pc, u8 device,
26 u32 pcicore_read32(struct ssb_pcicore *pc, u16 offset)  in pcicore_read32()  argument
28 	return ssb_read32(pc->dev, offset);  in pcicore_read32()
32 void pcicore_write32(struct ssb_pcicore *pc, u16 offset, u32 value)  in pcicore_write32()  argument
34 	ssb_write32(pc->dev, offset, value);  in pcicore_write32()
38 u16 pcicore_read16(struct ssb_pcicore *pc, u16 offset)  in pcicore_read16()  argument
40 	return ssb_read16(pc->dev, offset);  in pcicore_read16()
44 void pcicore_write16(struct ssb_pcicore *pc, u16 offset, u16 value)  in pcicore_write16()  argument
46 	ssb_write16(pc->dev, offset, value);  in pcicore_write16()
70 static u32 get_cfgspace_addr(struct ssb_pcicore *pc,  in get_cfgspace_addr()  argument
78 	if (pc->cardbusmode && (dev > 1))  in get_cfgspace_addr()
88 		pcicore_write32(pc, SSB_PCICORE_SBTOPCI1, tmp);  in get_cfgspace_addr()
96 		pcicore_write32(pc, SSB_PCICORE_SBTOPCI1,  in get_cfgspace_addr()
109 static int ssb_extpci_read_config(struct ssb_pcicore *pc,  in ssb_extpci_read_config()  argument
118 	SSB_WARN_ON(!pc->hostmode);  in ssb_extpci_read_config()
121 	addr = get_cfgspace_addr(pc, bus, dev, func, off);  in ssb_extpci_read_config()
155 static int ssb_extpci_write_config(struct ssb_pcicore *pc,  in ssb_extpci_write_config()  argument
164 	SSB_WARN_ON(!pc->hostmode);  in ssb_extpci_write_config()
167 	addr = get_cfgspace_addr(pc, bus, dev, func, off);  in ssb_extpci_write_config()
317 static void ssb_pcicore_init_hostmode(struct ssb_pcicore *pc)  in ssb_pcicore_init_hostmode()  argument
323 	extpci_core = pc;  in ssb_pcicore_init_hostmode()
329 	pcicore_write32(pc, SSB_PCICORE_CTL, val);  in ssb_pcicore_init_hostmode()
331 	pcicore_write32(pc, SSB_PCICORE_CTL, val);  in ssb_pcicore_init_hostmode()
334 	pcicore_write32(pc, SSB_PCICORE_CTL, val);  in ssb_pcicore_init_hostmode()
336 	pcicore_write32(pc, SSB_PCICORE_ARBCTL, val);  in ssb_pcicore_init_hostmode()
339 	if (pc->dev->bus->has_cardbus_slot) {  in ssb_pcicore_init_hostmode()
341 		pc->cardbusmode = 1;  in ssb_pcicore_init_hostmode()
343 		ssb_gpio_out(pc->dev->bus, 1, 1);  in ssb_pcicore_init_hostmode()
344 		ssb_gpio_outen(pc->dev->bus, 1, 1);  in ssb_pcicore_init_hostmode()
345 		pcicore_write16(pc, SSB_PCICORE_SPROM(0),  in ssb_pcicore_init_hostmode()
346 				pcicore_read16(pc, SSB_PCICORE_SPROM(0))  in ssb_pcicore_init_hostmode()
351 	pcicore_write32(pc, SSB_PCICORE_SBTOPCI0,  in ssb_pcicore_init_hostmode()
354 	pcicore_write32(pc, SSB_PCICORE_SBTOPCI1,  in ssb_pcicore_init_hostmode()
357 	pcicore_write32(pc, SSB_PCICORE_SBTOPCI2,  in ssb_pcicore_init_hostmode()
372 	ssb_extpci_write_config(pc, 0, 0, 0, PCI_COMMAND, &val, 2);  in ssb_pcicore_init_hostmode()
375 	ssb_extpci_write_config(pc, 0, 0, 0, PCI_STATUS, &val, 2);  in ssb_pcicore_init_hostmode()
378 	pcicore_write32(pc, SSB_PCICORE_IMASK,  in ssb_pcicore_init_hostmode()
392 static int pcicore_is_in_hostmode(struct ssb_pcicore *pc)  in pcicore_is_in_hostmode()  argument
394 	struct ssb_bus *bus = pc->dev->bus;  in pcicore_is_in_hostmode()
417 	return !mips_busprobe32(tmp, (bus->mmio + (pc->dev->core_index * SSB_CORE_SIZE)));  in pcicore_is_in_hostmode()
425 static void ssb_pcicore_fix_sprom_core_index(struct ssb_pcicore *pc)  in ssb_pcicore_fix_sprom_core_index()  argument
427 	u16 tmp = pcicore_read16(pc, SSB_PCICORE_SPROM(0));  in ssb_pcicore_fix_sprom_core_index()
428 	if (((tmp & 0xF000) >> 12) != pc->dev->core_index) {  in ssb_pcicore_fix_sprom_core_index()
430 		tmp |= (pc->dev->core_index << 12);  in ssb_pcicore_fix_sprom_core_index()
431 		pcicore_write16(pc, SSB_PCICORE_SPROM(0), tmp);  in ssb_pcicore_fix_sprom_core_index()
435 static u8 ssb_pcicore_polarity_workaround(struct ssb_pcicore *pc)  in ssb_pcicore_polarity_workaround()  argument
437 	return (ssb_pcie_read(pc, 0x204) & 0x10) ? 0xC0 : 0x80;  in ssb_pcicore_polarity_workaround()
440 static void ssb_pcicore_serdes_workaround(struct ssb_pcicore *pc)  in ssb_pcicore_serdes_workaround()  argument
446 	ssb_pcie_mdio_write(pc, serdes_rx_device, 1 /* Control */,  in ssb_pcicore_serdes_workaround()
447 			    ssb_pcicore_polarity_workaround(pc));  in ssb_pcicore_serdes_workaround()
448 	tmp = ssb_pcie_mdio_read(pc, serdes_pll_device, 1 /* Control */);  in ssb_pcicore_serdes_workaround()
450 		ssb_pcie_mdio_write(pc, serdes_pll_device, 1, tmp & ~0x4000);  in ssb_pcicore_serdes_workaround()
453 static void ssb_pcicore_pci_setup_workarounds(struct ssb_pcicore *pc)  in ssb_pcicore_pci_setup_workarounds()  argument
455 	struct ssb_device *pdev = pc->dev;  in ssb_pcicore_pci_setup_workarounds()
459 	tmp = pcicore_read32(pc, SSB_PCICORE_SBTOPCI2);  in ssb_pcicore_pci_setup_workarounds()
462 	pcicore_write32(pc, SSB_PCICORE_SBTOPCI2, tmp);  in ssb_pcicore_pci_setup_workarounds()
473 		tmp = pcicore_read32(pc, SSB_PCICORE_SBTOPCI2);  in ssb_pcicore_pci_setup_workarounds()
475 		pcicore_write32(pc, SSB_PCICORE_SBTOPCI2, tmp);  in ssb_pcicore_pci_setup_workarounds()
479 static void ssb_pcicore_pcie_setup_workarounds(struct ssb_pcicore *pc)  in ssb_pcicore_pcie_setup_workarounds()  argument
482 	u8 rev = pc->dev->id.revision;  in ssb_pcicore_pcie_setup_workarounds()
486 		tmp = ssb_pcie_read(pc, 0x4);  in ssb_pcicore_pcie_setup_workarounds()
488 		ssb_pcie_write(pc, 0x4, tmp);  in ssb_pcicore_pcie_setup_workarounds()
492 		tmp = ssb_pcie_read(pc, 0x100);  in ssb_pcicore_pcie_setup_workarounds()
494 		ssb_pcie_write(pc, 0x100, tmp);  in ssb_pcicore_pcie_setup_workarounds()
500 		ssb_pcie_mdio_write(pc, serdes_rx_device,  in ssb_pcicore_pcie_setup_workarounds()
502 		ssb_pcie_mdio_write(pc, serdes_rx_device,  in ssb_pcicore_pcie_setup_workarounds()
504 		ssb_pcie_mdio_write(pc, serdes_rx_device,  in ssb_pcicore_pcie_setup_workarounds()
508 		ssb_pcicore_serdes_workaround(pc);  in ssb_pcicore_pcie_setup_workarounds()
516 		tmp = pcicore_read16(pc, SSB_PCICORE_SPROM(5));  in ssb_pcicore_pcie_setup_workarounds()
518 			pcicore_write16(pc, SSB_PCICORE_SPROM(5),  in ssb_pcicore_pcie_setup_workarounds()
527 static void ssb_pcicore_init_clientmode(struct ssb_pcicore *pc)  in ssb_pcicore_init_clientmode()  argument
529 	struct ssb_device *pdev = pc->dev;  in ssb_pcicore_init_clientmode()
533 		ssb_pcicore_fix_sprom_core_index(pc);  in ssb_pcicore_init_clientmode()
539 	if (pc->dev->id.coreid == SSB_DEV_PCIE) {  in ssb_pcicore_init_clientmode()
540 		ssb_pcicore_serdes_workaround(pc);  in ssb_pcicore_init_clientmode()
546 void ssb_pcicore_init(struct ssb_pcicore *pc)  in ssb_pcicore_init()  argument
548 	struct ssb_device *dev = pc->dev;  in ssb_pcicore_init()
556 	pc->hostmode = pcicore_is_in_hostmode(pc);  in ssb_pcicore_init()
557 	if (pc->hostmode)  in ssb_pcicore_init()
558 		ssb_pcicore_init_hostmode(pc);  in ssb_pcicore_init()
560 	if (!pc->hostmode)  in ssb_pcicore_init()
561 		ssb_pcicore_init_clientmode(pc);  in ssb_pcicore_init()
564 static u32 ssb_pcie_read(struct ssb_pcicore *pc, u32 address)  in ssb_pcie_read()  argument
566 	pcicore_write32(pc, 0x130, address);  in ssb_pcie_read()
567 	return pcicore_read32(pc, 0x134);  in ssb_pcie_read()
570 static void ssb_pcie_write(struct ssb_pcicore *pc, u32 address, u32 data)  in ssb_pcie_write()  argument
572 	pcicore_write32(pc, 0x130, address);  in ssb_pcie_write()
573 	pcicore_write32(pc, 0x134, data);  in ssb_pcie_write()
576 static void ssb_pcie_mdio_set_phy(struct ssb_pcicore *pc, u8 phy)  in ssb_pcie_mdio_set_phy()  argument
588 	pcicore_write32(pc, mdio_data, v);  in ssb_pcie_mdio_set_phy()
592 		v = pcicore_read32(pc, mdio_control);  in ssb_pcie_mdio_set_phy()
599 static u16 ssb_pcie_mdio_read(struct ssb_pcicore *pc, u8 device, u8 address)  in ssb_pcie_mdio_read()  argument
610 	pcicore_write32(pc, mdio_control, v);  in ssb_pcie_mdio_read()
612 	if (pc->dev->id.revision >= 10) {  in ssb_pcie_mdio_read()
614 		ssb_pcie_mdio_set_phy(pc, device);  in ssb_pcie_mdio_read()
620 	if (pc->dev->id.revision < 10)  in ssb_pcie_mdio_read()
623 	pcicore_write32(pc, mdio_data, v);  in ssb_pcie_mdio_read()
627 		v = pcicore_read32(pc, mdio_control);  in ssb_pcie_mdio_read()
630 			ret = pcicore_read32(pc, mdio_data);  in ssb_pcie_mdio_read()
635 	pcicore_write32(pc, mdio_control, 0);  in ssb_pcie_mdio_read()
639 static void ssb_pcie_mdio_write(struct ssb_pcicore *pc, u8 device,  in ssb_pcie_mdio_write()  argument
650 	pcicore_write32(pc, mdio_control, v);  in ssb_pcie_mdio_write()
652 	if (pc->dev->id.revision >= 10) {  in ssb_pcie_mdio_write()
654 		ssb_pcie_mdio_set_phy(pc, device);  in ssb_pcie_mdio_write()
660 	if (pc->dev->id.revision < 10)  in ssb_pcie_mdio_write()
664 	pcicore_write32(pc, mdio_data, v);  in ssb_pcie_mdio_write()
668 		v = pcicore_read32(pc, mdio_control);  in ssb_pcie_mdio_write()
673 	pcicore_write32(pc, mdio_control, 0);  in ssb_pcie_mdio_write()
676 int ssb_pcicore_dev_irqvecs_enable(struct ssb_pcicore *pc,  in ssb_pcicore_dev_irqvecs_enable()  argument
679 	struct ssb_device *pdev = pc->dev;  in ssb_pcicore_dev_irqvecs_enable()
723 	if (pc->setup_done)  in ssb_pcicore_dev_irqvecs_enable()
726 		ssb_pcicore_pci_setup_workarounds(pc);  in ssb_pcicore_dev_irqvecs_enable()
729 		ssb_pcicore_pcie_setup_workarounds(pc);  in ssb_pcicore_dev_irqvecs_enable()
731 	pc->setup_done = 1;  in ssb_pcicore_dev_irqvecs_enable()