47 	u32 tmp;  in ssb_chipco_set_clockmode()  local
74 		tmp = chipco_read32(cc, SSB_CHIPCO_SLOWCLKCTL);  in ssb_chipco_set_clockmode()
75 		tmp |= SSB_CHIPCO_SLOWCLKCTL_FSLOW;  in ssb_chipco_set_clockmode()
76 		chipco_write32(cc, SSB_CHIPCO_SLOWCLKCTL, tmp);  in ssb_chipco_set_clockmode()
81 			tmp = chipco_read32(cc, SSB_CHIPCO_SLOWCLKCTL);  in ssb_chipco_set_clockmode()
82 			tmp &= ~SSB_CHIPCO_SLOWCLKCTL_FSLOW;  in ssb_chipco_set_clockmode()
83 			tmp |= SSB_CHIPCO_SLOWCLKCTL_IPLL;  in ssb_chipco_set_clockmode()
84 			chipco_write32(cc, SSB_CHIPCO_SLOWCLKCTL, tmp);  in ssb_chipco_set_clockmode()
94 			tmp = chipco_read32(cc, SSB_CHIPCO_SLOWCLKCTL);  in ssb_chipco_set_clockmode()
95 			tmp &= ~SSB_CHIPCO_SLOWCLKCTL_FSLOW;  in ssb_chipco_set_clockmode()
96 			tmp &= ~SSB_CHIPCO_SLOWCLKCTL_IPLL;  in ssb_chipco_set_clockmode()
97 			tmp &= ~SSB_CHIPCO_SLOWCLKCTL_ENXTAL;  in ssb_chipco_set_clockmode()
98 			if ((tmp & SSB_CHIPCO_SLOWCLKCTL_SRC) !=  in ssb_chipco_set_clockmode()
100 				tmp |= SSB_CHIPCO_SLOWCLKCTL_ENXTAL;  in ssb_chipco_set_clockmode()
101 			chipco_write32(cc, SSB_CHIPCO_SLOWCLKCTL, tmp);  in ssb_chipco_set_clockmode()
105 			if (tmp & SSB_CHIPCO_SLOWCLKCTL_ENXTAL)  in ssb_chipco_set_clockmode()
122 	u32 uninitialized_var(tmp);  in chipco_pctl_get_slowclksrc()
129 			pci_read_config_dword(bus->host_pci, SSB_GPIO_OUT, &tmp);  in chipco_pctl_get_slowclksrc()
130 			if (tmp & 0x10)  in chipco_pctl_get_slowclksrc()
136 		tmp = chipco_read32(cc, SSB_CHIPCO_SLOWCLKCTL);  in chipco_pctl_get_slowclksrc()
137 		tmp &= 0x7;  in chipco_pctl_get_slowclksrc()
138 		if (tmp == 0)  in chipco_pctl_get_slowclksrc()
140 		if (tmp == 1)  in chipco_pctl_get_slowclksrc()
142 		if (tmp == 2)  in chipco_pctl_get_slowclksrc()
155 	u32 tmp;  in chipco_pctl_clockfreqlimit()  local
175 			tmp = chipco_read32(cc, SSB_CHIPCO_SLOWCLKCTL);  in chipco_pctl_clockfreqlimit()
176 			divisor = (tmp >> 16) + 1;  in chipco_pctl_clockfreqlimit()
181 		tmp = chipco_read32(cc, SSB_CHIPCO_SYSCLKCTL);  in chipco_pctl_clockfreqlimit()
182 		divisor = (tmp >> 16) + 1;  in chipco_pctl_clockfreqlimit()
263 	unsigned int tmp;  in calc_fast_powerup_delay()  local
279 	tmp = (((pll_on_delay + 2) * 1000000) + (minfreq - 1)) / minfreq;  in calc_fast_powerup_delay()
280 	SSB_WARN_ON(tmp & ~0xFFFF);  in calc_fast_powerup_delay()
282 	cc->fast_pwrup_delay = tmp;  in calc_fast_powerup_delay()
439 	u32 tmp;  in ssb_chipco_timing_init()  local
443 	tmp = DIV_ROUND_UP(10, ns) << SSB_PROG_WCNT_3_SHIFT;		/* Waitcount-3 = 10ns */  in ssb_chipco_timing_init()
444 	tmp |= DIV_ROUND_UP(40, ns) << SSB_PROG_WCNT_1_SHIFT;	/* Waitcount-1 = 40ns */  in ssb_chipco_timing_init()
445 	tmp |= DIV_ROUND_UP(240, ns);				/* Waitcount-0 = 240ns */  in ssb_chipco_timing_init()
446 	chipco_write32(cc, SSB_CHIPCO_PROG_WAITCNT, tmp);	/* 0x01020a0c for a 100Mhz clock */  in ssb_chipco_timing_init()
449 	tmp = DIV_ROUND_UP(10, ns) << SSB_FLASH_WCNT_3_SHIFT;	/* Waitcount-3 = 10nS */  in ssb_chipco_timing_init()
450 	tmp |= DIV_ROUND_UP(10, ns) << SSB_FLASH_WCNT_1_SHIFT;	/* Waitcount-1 = 10nS */  in ssb_chipco_timing_init()
451 	tmp |= DIV_ROUND_UP(120, ns);				/* Waitcount-0 = 120nS */  in ssb_chipco_timing_init()
454 		chipco_write32(cc, SSB_CHIPCO_FLASH_WAITCNT, tmp);  in ssb_chipco_timing_init()
458 		chipco_write32(cc, SSB_CHIPCO_PCMCIA_MEMWAIT, tmp);  in ssb_chipco_timing_init()
462 		tmp = DIV_ROUND_UP(10, ns) << SSB_PROG_WCNT_3_SHIFT;	  /* Waitcount-3 = 10ns */  in ssb_chipco_timing_init()
463 		tmp |= DIV_ROUND_UP(20, ns) << SSB_PROG_WCNT_2_SHIFT;  /* Waitcount-2 = 20ns */  in ssb_chipco_timing_init()
464 		tmp |= DIV_ROUND_UP(100, ns) << SSB_PROG_WCNT_1_SHIFT; /* Waitcount-1 = 100ns */  in ssb_chipco_timing_init()
465 		tmp |= DIV_ROUND_UP(120, ns);			  /* Waitcount-0 = 120ns */  in ssb_chipco_timing_init()
466 		chipco_write32(cc, SSB_CHIPCO_PROG_WAITCNT, tmp); /* 0x01020a0c for a 100Mhz clock */  in ssb_chipco_timing_init()