95 	void (*write_fn)(u32, void __iomem *);  member
123 		xspi->write_fn(0, xspi->regs + XSPI_TXD_OFFSET);  in xilinx_spi_tx()
139 	xspi->write_fn(data, xspi->regs + XSPI_TXD_OFFSET);  in xilinx_spi_tx()
170 	xspi->write_fn(XIPIF_V123B_RESET_MASK,  in xspi_init_hw()
175 	xspi->write_fn(XSPI_INTR_TX_EMPTY,  in xspi_init_hw()
178 	xspi->write_fn(0, regs_base + XIPIF_V123B_DGIER_OFFSET);  in xspi_init_hw()
180 	xspi->write_fn(0xffff, regs_base + XSPI_SSR_OFFSET);  in xspi_init_hw()
183 	xspi->write_fn(XSPI_CR_MANUAL_SSELECT |	XSPI_CR_MASTER_MODE |  in xspi_init_hw()
196 		xspi->write_fn(xspi->cs_inactive, xspi->regs + XSPI_SSR_OFFSET);  in xilinx_spi_chipselect()
210 	xspi->write_fn(cr, xspi->regs + XSPI_CR_OFFSET);  in xilinx_spi_chipselect()
221 	xspi->write_fn(cs, xspi->regs + XSPI_SSR_OFFSET);  in xilinx_spi_chipselect()
258 		xspi->write_fn(cr | XSPI_CR_TRANS_INHIBIT,  in xilinx_spi_txrx_bufs()
263 			xspi->write_fn(isr,  in xilinx_spi_txrx_bufs()
266 		xspi->write_fn(XIPIF_V123B_GINTR_ENABLE,  in xilinx_spi_txrx_bufs()
286 			xspi->write_fn(cr, xspi->regs + XSPI_CR_OFFSET);  in xilinx_spi_txrx_bufs()
294 			xspi->write_fn(cr | XSPI_CR_TRANS_INHIBIT,  in xilinx_spi_txrx_bufs()
320 		xspi->write_fn(0, xspi->regs + XIPIF_V123B_DGIER_OFFSET);  in xilinx_spi_txrx_bufs()
321 		xspi->write_fn(cr, xspi->regs + XSPI_CR_OFFSET);  in xilinx_spi_txrx_bufs()
340 	xspi->write_fn(ipif_isr, xspi->regs + XIPIF_V123B_IISR_OFFSET);  in xilinx_spi_irq()
358 	xspi->write_fn(XIPIF_V123B_RESET_MASK,  in xilinx_spi_find_buffer_size()
363 		xspi->write_fn(0, xspi->regs + XSPI_TXD_OFFSET);  in xilinx_spi_find_buffer_size()
443 	xspi->write_fn = xspi_write32;  in xilinx_spi_probe()
445 	xspi->write_fn(XSPI_CR_LOOP, xspi->regs + XSPI_CR_OFFSET);  in xilinx_spi_probe()
450 		xspi->write_fn = xspi_write32_be;  in xilinx_spi_probe()
501 	xspi->write_fn(0, regs_base + XIPIF_V123B_IIER_OFFSET);  in xilinx_spi_remove()
503 	xspi->write_fn(0, regs_base + XIPIF_V123B_DGIER_OFFSET);  in xilinx_spi_remove()