668 	u32 command1;  in tegra_spi_setup_transfer_one()  local
685 		command1 = tspi->def_command1_reg;  in tegra_spi_setup_transfer_one()
686 		command1 |= SPI_BIT_LENGTH(bits_per_word - 1);  in tegra_spi_setup_transfer_one()
688 		command1 &= ~SPI_CONTROL_MODE_MASK;  in tegra_spi_setup_transfer_one()
691 			command1 |= SPI_CONTROL_MODE_0;  in tegra_spi_setup_transfer_one()
693 			command1 |= SPI_CONTROL_MODE_1;  in tegra_spi_setup_transfer_one()
695 			command1 |= SPI_CONTROL_MODE_2;  in tegra_spi_setup_transfer_one()
697 			command1 |= SPI_CONTROL_MODE_3;  in tegra_spi_setup_transfer_one()
701 				tegra_spi_writel(tspi, command1, SPI_COMMAND1);  in tegra_spi_setup_transfer_one()
704 			tegra_spi_writel(tspi, command1, SPI_COMMAND1);  in tegra_spi_setup_transfer_one()
706 		command1 |= SPI_CS_SW_HW;  in tegra_spi_setup_transfer_one()
708 			command1 |= SPI_CS_SS_VAL;  in tegra_spi_setup_transfer_one()
710 			command1 &= ~SPI_CS_SS_VAL;  in tegra_spi_setup_transfer_one()
714 		command1 = tspi->command1_reg;  in tegra_spi_setup_transfer_one()
715 		command1 &= ~SPI_BIT_LENGTH(~0);  in tegra_spi_setup_transfer_one()
716 		command1 |= SPI_BIT_LENGTH(bits_per_word - 1);  in tegra_spi_setup_transfer_one()
719 	return command1;  in tegra_spi_setup_transfer_one()
723 		struct spi_transfer *t, u32 command1)  in tegra_spi_start_transfer_one()  argument
732 		command1 |= SPI_PACKED;  in tegra_spi_start_transfer_one()
734 	command1 &= ~(SPI_CS_SEL_MASK | SPI_TX_EN | SPI_RX_EN);  in tegra_spi_start_transfer_one()
737 		command1 |= SPI_RX_EN;  in tegra_spi_start_transfer_one()
741 		command1 |= SPI_TX_EN;  in tegra_spi_start_transfer_one()
744 	command1 |= SPI_CS_SEL(spi->chip_select);  in tegra_spi_start_transfer_one()
745 	tegra_spi_writel(tspi, command1, SPI_COMMAND1);  in tegra_spi_start_transfer_one()
746 	tspi->command1_reg = command1;  in tegra_spi_start_transfer_one()
749 		tspi->def_command1_reg, (unsigned)command1);  in tegra_spi_start_transfer_one()