301 	void (*hwinit)(struct sirfsoc_spi *sspi);
304 static void sirfsoc_usp_hwinit(struct sirfsoc_spi *sspi)  in sirfsoc_usp_hwinit()  argument
307 	writel(readl(sspi->base + sspi->regs->usp_mode1) &  in sirfsoc_usp_hwinit()
308 		~SIRFSOC_USP_EN, sspi->base + sspi->regs->usp_mode1);  in sirfsoc_usp_hwinit()
309 	writel(readl(sspi->base + sspi->regs->usp_mode1) |  in sirfsoc_usp_hwinit()
310 		SIRFSOC_USP_EN, sspi->base + sspi->regs->usp_mode1);  in sirfsoc_usp_hwinit()
313 static void spi_sirfsoc_rx_word_u8(struct sirfsoc_spi *sspi)  in spi_sirfsoc_rx_word_u8()  argument
316 	u8 *rx = sspi->rx;  in spi_sirfsoc_rx_word_u8()
318 	data = readl(sspi->base + sspi->regs->rxfifo_data);  in spi_sirfsoc_rx_word_u8()
322 		sspi->rx = rx;  in spi_sirfsoc_rx_word_u8()
325 	sspi->left_rx_word--;  in spi_sirfsoc_rx_word_u8()
328 static void spi_sirfsoc_tx_word_u8(struct sirfsoc_spi *sspi)  in spi_sirfsoc_tx_word_u8()  argument
331 	const u8 *tx = sspi->tx;  in spi_sirfsoc_tx_word_u8()
335 		sspi->tx = tx;  in spi_sirfsoc_tx_word_u8()
337 	writel(data, sspi->base + sspi->regs->txfifo_data);  in spi_sirfsoc_tx_word_u8()
338 	sspi->left_tx_word--;  in spi_sirfsoc_tx_word_u8()
341 static void spi_sirfsoc_rx_word_u16(struct sirfsoc_spi *sspi)  in spi_sirfsoc_rx_word_u16()  argument
344 	u16 *rx = sspi->rx;  in spi_sirfsoc_rx_word_u16()
346 	data = readl(sspi->base + sspi->regs->rxfifo_data);  in spi_sirfsoc_rx_word_u16()
350 		sspi->rx = rx;  in spi_sirfsoc_rx_word_u16()
353 	sspi->left_rx_word--;  in spi_sirfsoc_rx_word_u16()
356 static void spi_sirfsoc_tx_word_u16(struct sirfsoc_spi *sspi)  in spi_sirfsoc_tx_word_u16()  argument
359 	const u16 *tx = sspi->tx;  in spi_sirfsoc_tx_word_u16()
363 		sspi->tx = tx;  in spi_sirfsoc_tx_word_u16()
366 	writel(data, sspi->base + sspi->regs->txfifo_data);  in spi_sirfsoc_tx_word_u16()
367 	sspi->left_tx_word--;  in spi_sirfsoc_tx_word_u16()
370 static void spi_sirfsoc_rx_word_u32(struct sirfsoc_spi *sspi)  in spi_sirfsoc_rx_word_u32()  argument
373 	u32 *rx = sspi->rx;  in spi_sirfsoc_rx_word_u32()
375 	data = readl(sspi->base + sspi->regs->rxfifo_data);  in spi_sirfsoc_rx_word_u32()
379 		sspi->rx = rx;  in spi_sirfsoc_rx_word_u32()
382 	sspi->left_rx_word--;  in spi_sirfsoc_rx_word_u32()
386 static void spi_sirfsoc_tx_word_u32(struct sirfsoc_spi *sspi)  in spi_sirfsoc_tx_word_u32()  argument
389 	const u32 *tx = sspi->tx;  in spi_sirfsoc_tx_word_u32()
393 		sspi->tx = tx;  in spi_sirfsoc_tx_word_u32()
396 	writel(data, sspi->base + sspi->regs->txfifo_data);  in spi_sirfsoc_tx_word_u32()
397 	sspi->left_tx_word--;  in spi_sirfsoc_tx_word_u32()
402 	struct sirfsoc_spi *sspi = dev_id;  in spi_sirfsoc_irq()  local
405 	spi_stat = readl(sspi->base + sspi->regs->int_st);  in spi_sirfsoc_irq()
406 	if (sspi->tx_by_cmd && sspi->type == SIRF_REAL_SPI  in spi_sirfsoc_irq()
408 		complete(&sspi->tx_done);  in spi_sirfsoc_irq()
409 		writel(0x0, sspi->base + sspi->regs->int_en);  in spi_sirfsoc_irq()
410 		writel(readl(sspi->base + sspi->regs->int_st),  in spi_sirfsoc_irq()
411 				sspi->base + sspi->regs->int_st);  in spi_sirfsoc_irq()
417 		complete(&sspi->tx_done);  in spi_sirfsoc_irq()
418 		complete(&sspi->rx_done);  in spi_sirfsoc_irq()
419 		switch (sspi->type) {  in spi_sirfsoc_irq()
422 			writel(0x0, sspi->base + sspi->regs->int_en);  in spi_sirfsoc_irq()
425 			writel(~0UL, sspi->base + sspi->regs->usp_int_en_clr);  in spi_sirfsoc_irq()
428 		writel(readl(sspi->base + sspi->regs->int_st),  in spi_sirfsoc_irq()
429 				sspi->base + sspi->regs->int_st);  in spi_sirfsoc_irq()
433 		complete(&sspi->tx_done);  in spi_sirfsoc_irq()
434 	while (!(readl(sspi->base + sspi->regs->int_st) &  in spi_sirfsoc_irq()
437 	complete(&sspi->rx_done);  in spi_sirfsoc_irq()
438 	switch (sspi->type) {  in spi_sirfsoc_irq()
441 		writel(0x0, sspi->base + sspi->regs->int_en);  in spi_sirfsoc_irq()
444 		writel(~0UL, sspi->base + sspi->regs->usp_int_en_clr);  in spi_sirfsoc_irq()
447 	writel(readl(sspi->base + sspi->regs->int_st),  in spi_sirfsoc_irq()
448 			sspi->base + sspi->regs->int_st);  in spi_sirfsoc_irq()
463 	struct sirfsoc_spi *sspi;  in spi_sirfsoc_cmd_transfer()  local
467 	sspi = spi_master_get_devdata(spi->master);  in spi_sirfsoc_cmd_transfer()
468 	writel(SIRFSOC_SPI_FIFO_RESET, sspi->base + sspi->regs->txfifo_op);  in spi_sirfsoc_cmd_transfer()
469 	writel(SIRFSOC_SPI_FIFO_START, sspi->base + sspi->regs->txfifo_op);  in spi_sirfsoc_cmd_transfer()
470 	memcpy(&cmd, sspi->tx, t->len);  in spi_sirfsoc_cmd_transfer()
471 	if (sspi->word_width == 1 && !(spi->mode & SPI_LSB_FIRST))  in spi_sirfsoc_cmd_transfer()
474 	if (sspi->word_width == 2 && t->len == 4 &&  in spi_sirfsoc_cmd_transfer()
477 	writel(cmd, sspi->base + sspi->regs->spi_cmd);  in spi_sirfsoc_cmd_transfer()
479 		sspi->base + sspi->regs->int_en);  in spi_sirfsoc_cmd_transfer()
481 		sspi->base + sspi->regs->tx_rx_en);  in spi_sirfsoc_cmd_transfer()
482 	if (wait_for_completion_timeout(&sspi->tx_done, timeout) == 0) {  in spi_sirfsoc_cmd_transfer()
486 	sspi->left_rx_word -= t->len;  in spi_sirfsoc_cmd_transfer()
492 	struct sirfsoc_spi *sspi;  in spi_sirfsoc_dma_transfer()  local
496 	sspi = spi_master_get_devdata(spi->master);  in spi_sirfsoc_dma_transfer()
497 	writel(SIRFSOC_SPI_FIFO_RESET, sspi->base + sspi->regs->rxfifo_op);  in spi_sirfsoc_dma_transfer()
498 	writel(SIRFSOC_SPI_FIFO_RESET, sspi->base + sspi->regs->txfifo_op);  in spi_sirfsoc_dma_transfer()
499 	switch (sspi->type) {  in spi_sirfsoc_dma_transfer()
502 			sspi->base + sspi->regs->rxfifo_op);  in spi_sirfsoc_dma_transfer()
504 			sspi->base + sspi->regs->txfifo_op);  in spi_sirfsoc_dma_transfer()
505 		writel(0, sspi->base + sspi->regs->int_en);  in spi_sirfsoc_dma_transfer()
508 		writel(0x0, sspi->base + sspi->regs->rxfifo_op);  in spi_sirfsoc_dma_transfer()
509 		writel(0x0, sspi->base + sspi->regs->txfifo_op);  in spi_sirfsoc_dma_transfer()
510 		writel(0, sspi->base + sspi->regs->int_en);  in spi_sirfsoc_dma_transfer()
513 		writel(0x0, sspi->base + sspi->regs->rxfifo_op);  in spi_sirfsoc_dma_transfer()
514 		writel(0x0, sspi->base + sspi->regs->txfifo_op);  in spi_sirfsoc_dma_transfer()
515 		writel(~0UL, sspi->base + sspi->regs->usp_int_en_clr);  in spi_sirfsoc_dma_transfer()
518 	writel(readl(sspi->base + sspi->regs->int_st),  in spi_sirfsoc_dma_transfer()
519 		sspi->base + sspi->regs->int_st);  in spi_sirfsoc_dma_transfer()
520 	if (sspi->left_tx_word < sspi->dat_max_frm_len) {  in spi_sirfsoc_dma_transfer()
521 		switch (sspi->type) {  in spi_sirfsoc_dma_transfer()
523 			writel(readl(sspi->base + sspi->regs->spi_ctrl) |  in spi_sirfsoc_dma_transfer()
526 				sspi->base + sspi->regs->spi_ctrl);  in spi_sirfsoc_dma_transfer()
527 			writel(sspi->left_tx_word - 1,  in spi_sirfsoc_dma_transfer()
528 				sspi->base + sspi->regs->tx_dma_io_len);  in spi_sirfsoc_dma_transfer()
529 			writel(sspi->left_tx_word - 1,  in spi_sirfsoc_dma_transfer()
530 				sspi->base + sspi->regs->rx_dma_io_len);  in spi_sirfsoc_dma_transfer()
535 			writel(sspi->left_tx_word * sspi->word_width,  in spi_sirfsoc_dma_transfer()
536 				sspi->base + sspi->regs->tx_dma_io_len);  in spi_sirfsoc_dma_transfer()
537 			writel(sspi->left_tx_word * sspi->word_width,  in spi_sirfsoc_dma_transfer()
538 				sspi->base + sspi->regs->rx_dma_io_len);  in spi_sirfsoc_dma_transfer()
542 		if (sspi->type == SIRF_REAL_SPI)  in spi_sirfsoc_dma_transfer()
543 			writel(readl(sspi->base + sspi->regs->spi_ctrl),  in spi_sirfsoc_dma_transfer()
544 				sspi->base + sspi->regs->spi_ctrl);  in spi_sirfsoc_dma_transfer()
545 		writel(0, sspi->base + sspi->regs->tx_dma_io_len);  in spi_sirfsoc_dma_transfer()
546 		writel(0, sspi->base + sspi->regs->rx_dma_io_len);  in spi_sirfsoc_dma_transfer()
548 	sspi->dst_start = dma_map_single(&spi->dev, sspi->rx, t->len,  in spi_sirfsoc_dma_transfer()
551 	rx_desc = dmaengine_prep_slave_single(sspi->rx_chan,  in spi_sirfsoc_dma_transfer()
552 		sspi->dst_start, t->len, DMA_DEV_TO_MEM,  in spi_sirfsoc_dma_transfer()
555 	rx_desc->callback_param = &sspi->rx_done;  in spi_sirfsoc_dma_transfer()
557 	sspi->src_start = dma_map_single(&spi->dev, (void *)sspi->tx, t->len,  in spi_sirfsoc_dma_transfer()
560 	tx_desc = dmaengine_prep_slave_single(sspi->tx_chan,  in spi_sirfsoc_dma_transfer()
561 		sspi->src_start, t->len, DMA_MEM_TO_DEV,  in spi_sirfsoc_dma_transfer()
564 	tx_desc->callback_param = &sspi->tx_done;  in spi_sirfsoc_dma_transfer()
568 	dma_async_issue_pending(sspi->tx_chan);  in spi_sirfsoc_dma_transfer()
569 	dma_async_issue_pending(sspi->rx_chan);  in spi_sirfsoc_dma_transfer()
571 			sspi->base + sspi->regs->tx_rx_en);  in spi_sirfsoc_dma_transfer()
572 	if (sspi->type == SIRF_USP_SPI_P2 ||  in spi_sirfsoc_dma_transfer()
573 		sspi->type == SIRF_USP_SPI_A7) {  in spi_sirfsoc_dma_transfer()
575 			sspi->base + sspi->regs->rxfifo_op);  in spi_sirfsoc_dma_transfer()
577 			sspi->base + sspi->regs->txfifo_op);  in spi_sirfsoc_dma_transfer()
579 	if (wait_for_completion_timeout(&sspi->rx_done, timeout) == 0) {  in spi_sirfsoc_dma_transfer()
581 		dmaengine_terminate_all(sspi->rx_chan);  in spi_sirfsoc_dma_transfer()
583 		sspi->left_rx_word = 0;  in spi_sirfsoc_dma_transfer()
589 	if (wait_for_completion_timeout(&sspi->tx_done, timeout) == 0) {  in spi_sirfsoc_dma_transfer()
591 		if (sspi->type == SIRF_USP_SPI_P2 ||  in spi_sirfsoc_dma_transfer()
592 			sspi->type == SIRF_USP_SPI_A7)  in spi_sirfsoc_dma_transfer()
593 			writel(0, sspi->base + sspi->regs->tx_rx_en);  in spi_sirfsoc_dma_transfer()
594 		dmaengine_terminate_all(sspi->tx_chan);  in spi_sirfsoc_dma_transfer()
596 	dma_unmap_single(&spi->dev, sspi->src_start, t->len, DMA_TO_DEVICE);  in spi_sirfsoc_dma_transfer()
597 	dma_unmap_single(&spi->dev, sspi->dst_start, t->len, DMA_FROM_DEVICE);  in spi_sirfsoc_dma_transfer()
599 	writel(0, sspi->base + sspi->regs->rxfifo_op);  in spi_sirfsoc_dma_transfer()
600 	writel(0, sspi->base + sspi->regs->txfifo_op);  in spi_sirfsoc_dma_transfer()
601 	if (sspi->left_tx_word >= sspi->dat_max_frm_len)  in spi_sirfsoc_dma_transfer()
602 		writel(0, sspi->base + sspi->regs->tx_rx_en);  in spi_sirfsoc_dma_transfer()
603 	if (sspi->type == SIRF_USP_SPI_P2 ||  in spi_sirfsoc_dma_transfer()
604 		sspi->type == SIRF_USP_SPI_A7)  in spi_sirfsoc_dma_transfer()
605 		writel(0, sspi->base + sspi->regs->tx_rx_en);  in spi_sirfsoc_dma_transfer()
611 	struct sirfsoc_spi *sspi;  in spi_sirfsoc_pio_transfer()  local
615 	sspi = spi_master_get_devdata(spi->master);  in spi_sirfsoc_pio_transfer()
618 			sspi->base + sspi->regs->rxfifo_op);  in spi_sirfsoc_pio_transfer()
620 			sspi->base + sspi->regs->txfifo_op);  in spi_sirfsoc_pio_transfer()
621 		switch (sspi->type) {  in spi_sirfsoc_pio_transfer()
623 			writel(0x0, sspi->base + sspi->regs->rxfifo_op);  in spi_sirfsoc_pio_transfer()
624 			writel(0x0, sspi->base + sspi->regs->txfifo_op);  in spi_sirfsoc_pio_transfer()
625 			writel(0, sspi->base + sspi->regs->int_en);  in spi_sirfsoc_pio_transfer()
626 			writel(readl(sspi->base + sspi->regs->int_st),  in spi_sirfsoc_pio_transfer()
627 				sspi->base + sspi->regs->int_st);  in spi_sirfsoc_pio_transfer()
628 			writel(min((sspi->left_tx_word * sspi->word_width),  in spi_sirfsoc_pio_transfer()
629 				sspi->fifo_size),  in spi_sirfsoc_pio_transfer()
630 				sspi->base + sspi->regs->tx_dma_io_len);  in spi_sirfsoc_pio_transfer()
631 			writel(min((sspi->left_rx_word * sspi->word_width),  in spi_sirfsoc_pio_transfer()
632 				sspi->fifo_size),  in spi_sirfsoc_pio_transfer()
633 				sspi->base + sspi->regs->rx_dma_io_len);  in spi_sirfsoc_pio_transfer()
636 			writel(0x0, sspi->base + sspi->regs->rxfifo_op);  in spi_sirfsoc_pio_transfer()
637 			writel(0x0, sspi->base + sspi->regs->txfifo_op);  in spi_sirfsoc_pio_transfer()
638 			writel(~0UL, sspi->base + sspi->regs->usp_int_en_clr);  in spi_sirfsoc_pio_transfer()
639 			writel(readl(sspi->base + sspi->regs->int_st),  in spi_sirfsoc_pio_transfer()
640 				sspi->base + sspi->regs->int_st);  in spi_sirfsoc_pio_transfer()
641 			writel(min((sspi->left_tx_word * sspi->word_width),  in spi_sirfsoc_pio_transfer()
642 				sspi->fifo_size),  in spi_sirfsoc_pio_transfer()
643 				sspi->base + sspi->regs->tx_dma_io_len);  in spi_sirfsoc_pio_transfer()
644 			writel(min((sspi->left_rx_word * sspi->word_width),  in spi_sirfsoc_pio_transfer()
645 				sspi->fifo_size),  in spi_sirfsoc_pio_transfer()
646 				sspi->base + sspi->regs->rx_dma_io_len);  in spi_sirfsoc_pio_transfer()
650 				sspi->base + sspi->regs->rxfifo_op);  in spi_sirfsoc_pio_transfer()
652 				sspi->base + sspi->regs->txfifo_op);  in spi_sirfsoc_pio_transfer()
653 			writel(0, sspi->base + sspi->regs->int_en);  in spi_sirfsoc_pio_transfer()
654 			writel(readl(sspi->base + sspi->regs->int_st),  in spi_sirfsoc_pio_transfer()
655 				sspi->base + sspi->regs->int_st);  in spi_sirfsoc_pio_transfer()
656 			writel(readl(sspi->base + sspi->regs->spi_ctrl) |  in spi_sirfsoc_pio_transfer()
659 				sspi->base + sspi->regs->spi_ctrl);  in spi_sirfsoc_pio_transfer()
660 			data_units = sspi->fifo_size / sspi->word_width;  in spi_sirfsoc_pio_transfer()
661 			writel(min(sspi->left_tx_word, data_units) - 1,  in spi_sirfsoc_pio_transfer()
662 				sspi->base + sspi->regs->tx_dma_io_len);  in spi_sirfsoc_pio_transfer()
663 			writel(min(sspi->left_rx_word, data_units) - 1,  in spi_sirfsoc_pio_transfer()
664 				sspi->base + sspi->regs->rx_dma_io_len);  in spi_sirfsoc_pio_transfer()
667 		while (!((readl(sspi->base + sspi->regs->txfifo_st)  in spi_sirfsoc_pio_transfer()
668 			& SIRFSOC_SPI_FIFO_FULL_MASK(sspi))) &&  in spi_sirfsoc_pio_transfer()
669 			sspi->left_tx_word)  in spi_sirfsoc_pio_transfer()
670 			sspi->tx_word(sspi);  in spi_sirfsoc_pio_transfer()
675 			sspi->base + sspi->regs->int_en);  in spi_sirfsoc_pio_transfer()
677 			sspi->base + sspi->regs->tx_rx_en);  in spi_sirfsoc_pio_transfer()
678 		if (sspi->type == SIRF_USP_SPI_P2 ||  in spi_sirfsoc_pio_transfer()
679 			sspi->type == SIRF_USP_SPI_A7) {  in spi_sirfsoc_pio_transfer()
681 				sspi->base + sspi->regs->rxfifo_op);  in spi_sirfsoc_pio_transfer()
683 				sspi->base + sspi->regs->txfifo_op);  in spi_sirfsoc_pio_transfer()
685 		if (!wait_for_completion_timeout(&sspi->tx_done, timeout) ||  in spi_sirfsoc_pio_transfer()
686 			!wait_for_completion_timeout(&sspi->rx_done, timeout)) {  in spi_sirfsoc_pio_transfer()
688 			if (sspi->type == SIRF_USP_SPI_P2 ||  in spi_sirfsoc_pio_transfer()
689 				sspi->type == SIRF_USP_SPI_A7)  in spi_sirfsoc_pio_transfer()
690 				writel(0, sspi->base + sspi->regs->tx_rx_en);  in spi_sirfsoc_pio_transfer()
693 		while (!((readl(sspi->base + sspi->regs->rxfifo_st)  in spi_sirfsoc_pio_transfer()
694 			& SIRFSOC_SPI_FIFO_EMPTY_MASK(sspi))) &&  in spi_sirfsoc_pio_transfer()
695 			sspi->left_rx_word)  in spi_sirfsoc_pio_transfer()
696 			sspi->rx_word(sspi);  in spi_sirfsoc_pio_transfer()
697 		if (sspi->type == SIRF_USP_SPI_P2 ||  in spi_sirfsoc_pio_transfer()
698 			sspi->type == SIRF_USP_SPI_A7)  in spi_sirfsoc_pio_transfer()
699 			writel(0, sspi->base + sspi->regs->tx_rx_en);  in spi_sirfsoc_pio_transfer()
700 		writel(0, sspi->base + sspi->regs->rxfifo_op);  in spi_sirfsoc_pio_transfer()
701 		writel(0, sspi->base + sspi->regs->txfifo_op);  in spi_sirfsoc_pio_transfer()
702 	} while (sspi->left_tx_word != 0 || sspi->left_rx_word != 0);  in spi_sirfsoc_pio_transfer()
707 	struct sirfsoc_spi *sspi;  in spi_sirfsoc_transfer()  local
709 	sspi = spi_master_get_devdata(spi->master);  in spi_sirfsoc_transfer()
710 	sspi->tx = t->tx_buf;  in spi_sirfsoc_transfer()
711 	sspi->rx = t->rx_buf;  in spi_sirfsoc_transfer()
712 	sspi->left_tx_word = sspi->left_rx_word = t->len / sspi->word_width;  in spi_sirfsoc_transfer()
713 	reinit_completion(&sspi->rx_done);  in spi_sirfsoc_transfer()
714 	reinit_completion(&sspi->tx_done);  in spi_sirfsoc_transfer()
720 	if (sspi->type == SIRF_REAL_SPI && sspi->tx_by_cmd)  in spi_sirfsoc_transfer()
727 	return t->len - sspi->left_rx_word * sspi->word_width;  in spi_sirfsoc_transfer()
732 	struct sirfsoc_spi *sspi = spi_master_get_devdata(spi->master);  in spi_sirfsoc_chipselect()  local
734 	if (sspi->hw_cs) {  in spi_sirfsoc_chipselect()
737 		switch (sspi->type) {  in spi_sirfsoc_chipselect()
739 			regval = readl(sspi->base + sspi->regs->spi_ctrl);  in spi_sirfsoc_chipselect()
754 			writel(regval, sspi->base + sspi->regs->spi_ctrl);  in spi_sirfsoc_chipselect()
758 			regval = readl(sspi->base +  in spi_sirfsoc_chipselect()
759 					sspi->regs->usp_pin_io_data);  in spi_sirfsoc_chipselect()
775 				sspi->base + sspi->regs->usp_pin_io_data);  in spi_sirfsoc_chipselect()
794 	struct sirfsoc_spi *sspi;  in spi_sirfsoc_config_mode()  local
797 	sspi = spi_master_get_devdata(spi->master);  in spi_sirfsoc_config_mode()
798 	regval = readl(sspi->base + sspi->regs->spi_ctrl);  in spi_sirfsoc_config_mode()
799 	usp_mode1 = readl(sspi->base + sspi->regs->usp_mode1);  in spi_sirfsoc_config_mode()
835 	writel((SIRFSOC_SPI_FIFO_LEVEL_CHK_MASK(sspi, sspi->fifo_size - 2) <<  in spi_sirfsoc_config_mode()
837 		(SIRFSOC_SPI_FIFO_LEVEL_CHK_MASK(sspi, sspi->fifo_size / 2) <<  in spi_sirfsoc_config_mode()
839 		(SIRFSOC_SPI_FIFO_LEVEL_CHK_MASK(sspi, 2) <<  in spi_sirfsoc_config_mode()
841 		sspi->base + sspi->regs->txfifo_level_chk);  in spi_sirfsoc_config_mode()
842 	writel((SIRFSOC_SPI_FIFO_LEVEL_CHK_MASK(sspi, 2) <<  in spi_sirfsoc_config_mode()
844 		(SIRFSOC_SPI_FIFO_LEVEL_CHK_MASK(sspi, sspi->fifo_size / 2) <<  in spi_sirfsoc_config_mode()
846 		(SIRFSOC_SPI_FIFO_LEVEL_CHK_MASK(sspi, sspi->fifo_size - 2) <<  in spi_sirfsoc_config_mode()
848 		sspi->base + sspi->regs->rxfifo_level_chk);  in spi_sirfsoc_config_mode()
853 	switch (sspi->type) {  in spi_sirfsoc_config_mode()
856 		writel(regval, sspi->base + sspi->regs->spi_ctrl);  in spi_sirfsoc_config_mode()
863 		writel(usp_mode1, sspi->base + sspi->regs->usp_mode1);  in spi_sirfsoc_config_mode()
873 	struct sirfsoc_spi *sspi;  in spi_sirfsoc_setup_transfer()  local
878 	sspi = spi_master_get_devdata(spi->master);  in spi_sirfsoc_setup_transfer()
883 	usp_mode2 = regval = (sspi->ctrl_freq / (2 * hz)) - 1;  in spi_sirfsoc_setup_transfer()
891 		sspi->rx_word = spi_sirfsoc_rx_word_u8;  in spi_sirfsoc_setup_transfer()
892 		sspi->tx_word = spi_sirfsoc_tx_word_u8;  in spi_sirfsoc_setup_transfer()
899 		sspi->rx_word = spi_sirfsoc_rx_word_u16;  in spi_sirfsoc_setup_transfer()
900 		sspi->tx_word = spi_sirfsoc_tx_word_u16;  in spi_sirfsoc_setup_transfer()
904 		sspi->rx_word = spi_sirfsoc_rx_word_u32;  in spi_sirfsoc_setup_transfer()
905 		sspi->tx_word = spi_sirfsoc_tx_word_u32;  in spi_sirfsoc_setup_transfer()
911 	sspi->word_width = DIV_ROUND_UP(bits_per_word, 8);  in spi_sirfsoc_setup_transfer()
912 	txfifo_ctrl = (((sspi->fifo_size / 2) &  in spi_sirfsoc_setup_transfer()
913 			SIRFSOC_SPI_FIFO_THD_MASK(sspi))  in spi_sirfsoc_setup_transfer()
915 			(sspi->word_width >> 1);  in spi_sirfsoc_setup_transfer()
916 	rxfifo_ctrl = (((sspi->fifo_size / 2) &  in spi_sirfsoc_setup_transfer()
917 			SIRFSOC_SPI_FIFO_THD_MASK(sspi))  in spi_sirfsoc_setup_transfer()
919 			(sspi->word_width >> 1);  in spi_sirfsoc_setup_transfer()
920 	writel(txfifo_ctrl, sspi->base + sspi->regs->txfifo_ctrl);  in spi_sirfsoc_setup_transfer()
921 	writel(rxfifo_ctrl, sspi->base + sspi->regs->rxfifo_ctrl);  in spi_sirfsoc_setup_transfer()
922 	if (sspi->type == SIRF_USP_SPI_P2 ||  in spi_sirfsoc_setup_transfer()
923 		sspi->type == SIRF_USP_SPI_A7) {  in spi_sirfsoc_setup_transfer()
948 			sspi->base + sspi->regs->usp_tx_frame_ctrl);  in spi_sirfsoc_setup_transfer()
952 			sspi->base + sspi->regs->usp_rx_frame_ctrl);  in spi_sirfsoc_setup_transfer()
953 		writel(readl(sspi->base + sspi->regs->usp_mode2) |  in spi_sirfsoc_setup_transfer()
960 			sspi->base + sspi->regs->usp_mode2);  in spi_sirfsoc_setup_transfer()
962 	if (sspi->type == SIRF_REAL_SPI)  in spi_sirfsoc_setup_transfer()
963 		writel(regval, sspi->base + sspi->regs->spi_ctrl);  in spi_sirfsoc_setup_transfer()
965 	if (sspi->type == SIRF_REAL_SPI) {  in spi_sirfsoc_setup_transfer()
968 			sspi->tx_by_cmd = true;  in spi_sirfsoc_setup_transfer()
969 			writel(readl(sspi->base + sspi->regs->spi_ctrl) |  in spi_sirfsoc_setup_transfer()
972 				sspi->base + sspi->regs->spi_ctrl);  in spi_sirfsoc_setup_transfer()
974 			sspi->tx_by_cmd = false;  in spi_sirfsoc_setup_transfer()
975 			writel(readl(sspi->base + sspi->regs->spi_ctrl) &  in spi_sirfsoc_setup_transfer()
977 				sspi->base + sspi->regs->spi_ctrl);  in spi_sirfsoc_setup_transfer()
982 		writel(0, sspi->base + sspi->regs->tx_dma_io_ctrl);  in spi_sirfsoc_setup_transfer()
984 			sspi->base + sspi->regs->rx_dma_io_ctrl);  in spi_sirfsoc_setup_transfer()
988 			sspi->base + sspi->regs->tx_dma_io_ctrl);  in spi_sirfsoc_setup_transfer()
990 			sspi->base + sspi->regs->rx_dma_io_ctrl);  in spi_sirfsoc_setup_transfer()
997 	struct sirfsoc_spi *sspi;  in spi_sirfsoc_setup()  local
1000 	sspi = spi_master_get_devdata(spi->master);  in spi_sirfsoc_setup()
1002 		sspi->hw_cs = true;  in spi_sirfsoc_setup()
1004 		sspi->hw_cs = false;  in spi_sirfsoc_setup()
1072 	struct sirfsoc_spi *sspi;  in spi_sirfsoc_probe()  local
1086 	master = spi_alloc_master(&pdev->dev, sizeof(*sspi));  in spi_sirfsoc_probe()
1093 	sspi = spi_master_get_devdata(master);  in spi_sirfsoc_probe()
1094 	sspi->fifo_full_offset = ilog2(sspi->fifo_size);  in spi_sirfsoc_probe()
1096 	sspi->regs = spi_comp_data->regs;  in spi_sirfsoc_probe()
1097 	sspi->type = spi_comp_data->type;  in spi_sirfsoc_probe()
1098 	sspi->fifo_level_chk_mask = (sspi->fifo_size / 4) - 1;  in spi_sirfsoc_probe()
1099 	sspi->dat_max_frm_len = spi_comp_data->dat_max_frm_len;  in spi_sirfsoc_probe()
1100 	sspi->fifo_size = spi_comp_data->fifo_size;  in spi_sirfsoc_probe()
1102 	sspi->base = devm_ioremap_resource(&pdev->dev, mem_res);  in spi_sirfsoc_probe()
1103 	if (IS_ERR(sspi->base)) {  in spi_sirfsoc_probe()
1104 		ret = PTR_ERR(sspi->base);  in spi_sirfsoc_probe()
1113 				DRIVER_NAME, sspi);  in spi_sirfsoc_probe()
1117 	sspi->bitbang.master = master;  in spi_sirfsoc_probe()
1118 	sspi->bitbang.chipselect = spi_sirfsoc_chipselect;  in spi_sirfsoc_probe()
1119 	sspi->bitbang.setup_transfer = spi_sirfsoc_setup_transfer;  in spi_sirfsoc_probe()
1120 	sspi->bitbang.txrx_bufs = spi_sirfsoc_transfer;  in spi_sirfsoc_probe()
1121 	sspi->bitbang.master->setup = spi_sirfsoc_setup;  in spi_sirfsoc_probe()
1122 	sspi->bitbang.master->cleanup = spi_sirfsoc_cleanup;  in spi_sirfsoc_probe()
1129 	sspi->bitbang.master->dev.of_node = pdev->dev.of_node;  in spi_sirfsoc_probe()
1132 	sspi->rx_chan = dma_request_slave_channel(&pdev->dev, "rx");  in spi_sirfsoc_probe()
1133 	if (!sspi->rx_chan) {  in spi_sirfsoc_probe()
1138 	sspi->tx_chan = dma_request_slave_channel(&pdev->dev, "tx");  in spi_sirfsoc_probe()
1139 	if (!sspi->tx_chan) {  in spi_sirfsoc_probe()
1145 	sspi->clk = clk_get(&pdev->dev, NULL);  in spi_sirfsoc_probe()
1146 	if (IS_ERR(sspi->clk)) {  in spi_sirfsoc_probe()
1147 		ret = PTR_ERR(sspi->clk);  in spi_sirfsoc_probe()
1150 	clk_prepare_enable(sspi->clk);  in spi_sirfsoc_probe()
1152 		spi_comp_data->hwinit(sspi);  in spi_sirfsoc_probe()
1153 	sspi->ctrl_freq = clk_get_rate(sspi->clk);  in spi_sirfsoc_probe()
1155 	init_completion(&sspi->rx_done);  in spi_sirfsoc_probe()
1156 	init_completion(&sspi->tx_done);  in spi_sirfsoc_probe()
1158 	ret = spi_bitbang_start(&sspi->bitbang);  in spi_sirfsoc_probe()
1165 	clk_disable_unprepare(sspi->clk);  in spi_sirfsoc_probe()
1166 	clk_put(sspi->clk);  in spi_sirfsoc_probe()
1168 	dma_release_channel(sspi->tx_chan);  in spi_sirfsoc_probe()
1170 	dma_release_channel(sspi->rx_chan);  in spi_sirfsoc_probe()
1180 	struct sirfsoc_spi *sspi;  in spi_sirfsoc_remove()  local
1183 	sspi = spi_master_get_devdata(master);  in spi_sirfsoc_remove()
1184 	spi_bitbang_stop(&sspi->bitbang);  in spi_sirfsoc_remove()
1185 	clk_disable_unprepare(sspi->clk);  in spi_sirfsoc_remove()
1186 	clk_put(sspi->clk);  in spi_sirfsoc_remove()
1187 	dma_release_channel(sspi->rx_chan);  in spi_sirfsoc_remove()
1188 	dma_release_channel(sspi->tx_chan);  in spi_sirfsoc_remove()
1197 	struct sirfsoc_spi *sspi = spi_master_get_devdata(master);  in spi_sirfsoc_suspend()  local
1204 	clk_disable(sspi->clk);  in spi_sirfsoc_suspend()
1211 	struct sirfsoc_spi *sspi = spi_master_get_devdata(master);  in spi_sirfsoc_resume()  local
1213 	clk_enable(sspi->clk);  in spi_sirfsoc_resume()
1214 	writel(SIRFSOC_SPI_FIFO_RESET, sspi->base + sspi->regs->txfifo_op);  in spi_sirfsoc_resume()
1215 	writel(SIRFSOC_SPI_FIFO_RESET, sspi->base + sspi->regs->rxfifo_op);  in spi_sirfsoc_resume()
1216 	writel(SIRFSOC_SPI_FIFO_START, sspi->base + sspi->regs->txfifo_op);  in spi_sirfsoc_resume()
1217 	writel(SIRFSOC_SPI_FIFO_START, sspi->base + sspi->regs->rxfifo_op);  in spi_sirfsoc_resume()