Lines Matching refs:base
256 void __iomem *base; member
307 writel(readl(sspi->base + sspi->regs->usp_mode1) & in sirfsoc_usp_hwinit()
308 ~SIRFSOC_USP_EN, sspi->base + sspi->regs->usp_mode1); in sirfsoc_usp_hwinit()
309 writel(readl(sspi->base + sspi->regs->usp_mode1) | in sirfsoc_usp_hwinit()
310 SIRFSOC_USP_EN, sspi->base + sspi->regs->usp_mode1); in sirfsoc_usp_hwinit()
318 data = readl(sspi->base + sspi->regs->rxfifo_data); in spi_sirfsoc_rx_word_u8()
337 writel(data, sspi->base + sspi->regs->txfifo_data); in spi_sirfsoc_tx_word_u8()
346 data = readl(sspi->base + sspi->regs->rxfifo_data); in spi_sirfsoc_rx_word_u16()
366 writel(data, sspi->base + sspi->regs->txfifo_data); in spi_sirfsoc_tx_word_u16()
375 data = readl(sspi->base + sspi->regs->rxfifo_data); in spi_sirfsoc_rx_word_u32()
396 writel(data, sspi->base + sspi->regs->txfifo_data); in spi_sirfsoc_tx_word_u32()
405 spi_stat = readl(sspi->base + sspi->regs->int_st); in spi_sirfsoc_irq()
409 writel(0x0, sspi->base + sspi->regs->int_en); in spi_sirfsoc_irq()
410 writel(readl(sspi->base + sspi->regs->int_st), in spi_sirfsoc_irq()
411 sspi->base + sspi->regs->int_st); in spi_sirfsoc_irq()
422 writel(0x0, sspi->base + sspi->regs->int_en); in spi_sirfsoc_irq()
425 writel(~0UL, sspi->base + sspi->regs->usp_int_en_clr); in spi_sirfsoc_irq()
428 writel(readl(sspi->base + sspi->regs->int_st), in spi_sirfsoc_irq()
429 sspi->base + sspi->regs->int_st); in spi_sirfsoc_irq()
434 while (!(readl(sspi->base + sspi->regs->int_st) & in spi_sirfsoc_irq()
441 writel(0x0, sspi->base + sspi->regs->int_en); in spi_sirfsoc_irq()
444 writel(~0UL, sspi->base + sspi->regs->usp_int_en_clr); in spi_sirfsoc_irq()
447 writel(readl(sspi->base + sspi->regs->int_st), in spi_sirfsoc_irq()
448 sspi->base + sspi->regs->int_st); in spi_sirfsoc_irq()
468 writel(SIRFSOC_SPI_FIFO_RESET, sspi->base + sspi->regs->txfifo_op); in spi_sirfsoc_cmd_transfer()
469 writel(SIRFSOC_SPI_FIFO_START, sspi->base + sspi->regs->txfifo_op); in spi_sirfsoc_cmd_transfer()
477 writel(cmd, sspi->base + sspi->regs->spi_cmd); in spi_sirfsoc_cmd_transfer()
479 sspi->base + sspi->regs->int_en); in spi_sirfsoc_cmd_transfer()
481 sspi->base + sspi->regs->tx_rx_en); in spi_sirfsoc_cmd_transfer()
497 writel(SIRFSOC_SPI_FIFO_RESET, sspi->base + sspi->regs->rxfifo_op); in spi_sirfsoc_dma_transfer()
498 writel(SIRFSOC_SPI_FIFO_RESET, sspi->base + sspi->regs->txfifo_op); in spi_sirfsoc_dma_transfer()
502 sspi->base + sspi->regs->rxfifo_op); in spi_sirfsoc_dma_transfer()
504 sspi->base + sspi->regs->txfifo_op); in spi_sirfsoc_dma_transfer()
505 writel(0, sspi->base + sspi->regs->int_en); in spi_sirfsoc_dma_transfer()
508 writel(0x0, sspi->base + sspi->regs->rxfifo_op); in spi_sirfsoc_dma_transfer()
509 writel(0x0, sspi->base + sspi->regs->txfifo_op); in spi_sirfsoc_dma_transfer()
510 writel(0, sspi->base + sspi->regs->int_en); in spi_sirfsoc_dma_transfer()
513 writel(0x0, sspi->base + sspi->regs->rxfifo_op); in spi_sirfsoc_dma_transfer()
514 writel(0x0, sspi->base + sspi->regs->txfifo_op); in spi_sirfsoc_dma_transfer()
515 writel(~0UL, sspi->base + sspi->regs->usp_int_en_clr); in spi_sirfsoc_dma_transfer()
518 writel(readl(sspi->base + sspi->regs->int_st), in spi_sirfsoc_dma_transfer()
519 sspi->base + sspi->regs->int_st); in spi_sirfsoc_dma_transfer()
523 writel(readl(sspi->base + sspi->regs->spi_ctrl) | in spi_sirfsoc_dma_transfer()
526 sspi->base + sspi->regs->spi_ctrl); in spi_sirfsoc_dma_transfer()
528 sspi->base + sspi->regs->tx_dma_io_len); in spi_sirfsoc_dma_transfer()
530 sspi->base + sspi->regs->rx_dma_io_len); in spi_sirfsoc_dma_transfer()
536 sspi->base + sspi->regs->tx_dma_io_len); in spi_sirfsoc_dma_transfer()
538 sspi->base + sspi->regs->rx_dma_io_len); in spi_sirfsoc_dma_transfer()
543 writel(readl(sspi->base + sspi->regs->spi_ctrl), in spi_sirfsoc_dma_transfer()
544 sspi->base + sspi->regs->spi_ctrl); in spi_sirfsoc_dma_transfer()
545 writel(0, sspi->base + sspi->regs->tx_dma_io_len); in spi_sirfsoc_dma_transfer()
546 writel(0, sspi->base + sspi->regs->rx_dma_io_len); in spi_sirfsoc_dma_transfer()
571 sspi->base + sspi->regs->tx_rx_en); in spi_sirfsoc_dma_transfer()
575 sspi->base + sspi->regs->rxfifo_op); in spi_sirfsoc_dma_transfer()
577 sspi->base + sspi->regs->txfifo_op); in spi_sirfsoc_dma_transfer()
593 writel(0, sspi->base + sspi->regs->tx_rx_en); in spi_sirfsoc_dma_transfer()
599 writel(0, sspi->base + sspi->regs->rxfifo_op); in spi_sirfsoc_dma_transfer()
600 writel(0, sspi->base + sspi->regs->txfifo_op); in spi_sirfsoc_dma_transfer()
602 writel(0, sspi->base + sspi->regs->tx_rx_en); in spi_sirfsoc_dma_transfer()
605 writel(0, sspi->base + sspi->regs->tx_rx_en); in spi_sirfsoc_dma_transfer()
618 sspi->base + sspi->regs->rxfifo_op); in spi_sirfsoc_pio_transfer()
620 sspi->base + sspi->regs->txfifo_op); in spi_sirfsoc_pio_transfer()
623 writel(0x0, sspi->base + sspi->regs->rxfifo_op); in spi_sirfsoc_pio_transfer()
624 writel(0x0, sspi->base + sspi->regs->txfifo_op); in spi_sirfsoc_pio_transfer()
625 writel(0, sspi->base + sspi->regs->int_en); in spi_sirfsoc_pio_transfer()
626 writel(readl(sspi->base + sspi->regs->int_st), in spi_sirfsoc_pio_transfer()
627 sspi->base + sspi->regs->int_st); in spi_sirfsoc_pio_transfer()
630 sspi->base + sspi->regs->tx_dma_io_len); in spi_sirfsoc_pio_transfer()
633 sspi->base + sspi->regs->rx_dma_io_len); in spi_sirfsoc_pio_transfer()
636 writel(0x0, sspi->base + sspi->regs->rxfifo_op); in spi_sirfsoc_pio_transfer()
637 writel(0x0, sspi->base + sspi->regs->txfifo_op); in spi_sirfsoc_pio_transfer()
638 writel(~0UL, sspi->base + sspi->regs->usp_int_en_clr); in spi_sirfsoc_pio_transfer()
639 writel(readl(sspi->base + sspi->regs->int_st), in spi_sirfsoc_pio_transfer()
640 sspi->base + sspi->regs->int_st); in spi_sirfsoc_pio_transfer()
643 sspi->base + sspi->regs->tx_dma_io_len); in spi_sirfsoc_pio_transfer()
646 sspi->base + sspi->regs->rx_dma_io_len); in spi_sirfsoc_pio_transfer()
650 sspi->base + sspi->regs->rxfifo_op); in spi_sirfsoc_pio_transfer()
652 sspi->base + sspi->regs->txfifo_op); in spi_sirfsoc_pio_transfer()
653 writel(0, sspi->base + sspi->regs->int_en); in spi_sirfsoc_pio_transfer()
654 writel(readl(sspi->base + sspi->regs->int_st), in spi_sirfsoc_pio_transfer()
655 sspi->base + sspi->regs->int_st); in spi_sirfsoc_pio_transfer()
656 writel(readl(sspi->base + sspi->regs->spi_ctrl) | in spi_sirfsoc_pio_transfer()
659 sspi->base + sspi->regs->spi_ctrl); in spi_sirfsoc_pio_transfer()
662 sspi->base + sspi->regs->tx_dma_io_len); in spi_sirfsoc_pio_transfer()
664 sspi->base + sspi->regs->rx_dma_io_len); in spi_sirfsoc_pio_transfer()
667 while (!((readl(sspi->base + sspi->regs->txfifo_st) in spi_sirfsoc_pio_transfer()
675 sspi->base + sspi->regs->int_en); in spi_sirfsoc_pio_transfer()
677 sspi->base + sspi->regs->tx_rx_en); in spi_sirfsoc_pio_transfer()
681 sspi->base + sspi->regs->rxfifo_op); in spi_sirfsoc_pio_transfer()
683 sspi->base + sspi->regs->txfifo_op); in spi_sirfsoc_pio_transfer()
690 writel(0, sspi->base + sspi->regs->tx_rx_en); in spi_sirfsoc_pio_transfer()
693 while (!((readl(sspi->base + sspi->regs->rxfifo_st) in spi_sirfsoc_pio_transfer()
699 writel(0, sspi->base + sspi->regs->tx_rx_en); in spi_sirfsoc_pio_transfer()
700 writel(0, sspi->base + sspi->regs->rxfifo_op); in spi_sirfsoc_pio_transfer()
701 writel(0, sspi->base + sspi->regs->txfifo_op); in spi_sirfsoc_pio_transfer()
739 regval = readl(sspi->base + sspi->regs->spi_ctrl); in spi_sirfsoc_chipselect()
754 writel(regval, sspi->base + sspi->regs->spi_ctrl); in spi_sirfsoc_chipselect()
758 regval = readl(sspi->base + in spi_sirfsoc_chipselect()
775 sspi->base + sspi->regs->usp_pin_io_data); in spi_sirfsoc_chipselect()
798 regval = readl(sspi->base + sspi->regs->spi_ctrl); in spi_sirfsoc_config_mode()
799 usp_mode1 = readl(sspi->base + sspi->regs->usp_mode1); in spi_sirfsoc_config_mode()
841 sspi->base + sspi->regs->txfifo_level_chk); in spi_sirfsoc_config_mode()
848 sspi->base + sspi->regs->rxfifo_level_chk); in spi_sirfsoc_config_mode()
856 writel(regval, sspi->base + sspi->regs->spi_ctrl); in spi_sirfsoc_config_mode()
863 writel(usp_mode1, sspi->base + sspi->regs->usp_mode1); in spi_sirfsoc_config_mode()
920 writel(txfifo_ctrl, sspi->base + sspi->regs->txfifo_ctrl); in spi_sirfsoc_setup_transfer()
921 writel(rxfifo_ctrl, sspi->base + sspi->regs->rxfifo_ctrl); in spi_sirfsoc_setup_transfer()
948 sspi->base + sspi->regs->usp_tx_frame_ctrl); in spi_sirfsoc_setup_transfer()
952 sspi->base + sspi->regs->usp_rx_frame_ctrl); in spi_sirfsoc_setup_transfer()
953 writel(readl(sspi->base + sspi->regs->usp_mode2) | in spi_sirfsoc_setup_transfer()
960 sspi->base + sspi->regs->usp_mode2); in spi_sirfsoc_setup_transfer()
963 writel(regval, sspi->base + sspi->regs->spi_ctrl); in spi_sirfsoc_setup_transfer()
969 writel(readl(sspi->base + sspi->regs->spi_ctrl) | in spi_sirfsoc_setup_transfer()
972 sspi->base + sspi->regs->spi_ctrl); in spi_sirfsoc_setup_transfer()
975 writel(readl(sspi->base + sspi->regs->spi_ctrl) & in spi_sirfsoc_setup_transfer()
977 sspi->base + sspi->regs->spi_ctrl); in spi_sirfsoc_setup_transfer()
982 writel(0, sspi->base + sspi->regs->tx_dma_io_ctrl); in spi_sirfsoc_setup_transfer()
984 sspi->base + sspi->regs->rx_dma_io_ctrl); in spi_sirfsoc_setup_transfer()
988 sspi->base + sspi->regs->tx_dma_io_ctrl); in spi_sirfsoc_setup_transfer()
990 sspi->base + sspi->regs->rx_dma_io_ctrl); in spi_sirfsoc_setup_transfer()
1102 sspi->base = devm_ioremap_resource(&pdev->dev, mem_res); in spi_sirfsoc_probe()
1103 if (IS_ERR(sspi->base)) { in spi_sirfsoc_probe()
1104 ret = PTR_ERR(sspi->base); in spi_sirfsoc_probe()
1214 writel(SIRFSOC_SPI_FIFO_RESET, sspi->base + sspi->regs->txfifo_op); in spi_sirfsoc_resume()
1215 writel(SIRFSOC_SPI_FIFO_RESET, sspi->base + sspi->regs->rxfifo_op); in spi_sirfsoc_resume()
1216 writel(SIRFSOC_SPI_FIFO_START, sspi->base + sspi->regs->txfifo_op); in spi_sirfsoc_resume()
1217 writel(SIRFSOC_SPI_FIFO_START, sspi->base + sspi->regs->rxfifo_op); in spi_sirfsoc_resume()