Lines Matching refs:ss

93 static void spi_sh_write(struct spi_sh_data *ss, unsigned long data,  in spi_sh_write()  argument
96 if (ss->width == 8) in spi_sh_write()
97 iowrite8(data, ss->addr + (offset >> 2)); in spi_sh_write()
98 else if (ss->width == 32) in spi_sh_write()
99 iowrite32(data, ss->addr + offset); in spi_sh_write()
102 static unsigned long spi_sh_read(struct spi_sh_data *ss, unsigned long offset) in spi_sh_read() argument
104 if (ss->width == 8) in spi_sh_read()
105 return ioread8(ss->addr + (offset >> 2)); in spi_sh_read()
106 else if (ss->width == 32) in spi_sh_read()
107 return ioread32(ss->addr + offset); in spi_sh_read()
112 static void spi_sh_set_bit(struct spi_sh_data *ss, unsigned long val, in spi_sh_set_bit() argument
117 tmp = spi_sh_read(ss, offset); in spi_sh_set_bit()
119 spi_sh_write(ss, tmp, offset); in spi_sh_set_bit()
122 static void spi_sh_clear_bit(struct spi_sh_data *ss, unsigned long val, in spi_sh_clear_bit() argument
127 tmp = spi_sh_read(ss, offset); in spi_sh_clear_bit()
129 spi_sh_write(ss, tmp, offset); in spi_sh_clear_bit()
132 static void clear_fifo(struct spi_sh_data *ss) in clear_fifo() argument
134 spi_sh_set_bit(ss, SPI_SH_RSTF, SPI_SH_CR2); in clear_fifo()
135 spi_sh_clear_bit(ss, SPI_SH_RSTF, SPI_SH_CR2); in clear_fifo()
138 static int spi_sh_wait_receive_buffer(struct spi_sh_data *ss) in spi_sh_wait_receive_buffer() argument
142 while (spi_sh_read(ss, SPI_SH_CR1) & SPI_SH_RBE) { in spi_sh_wait_receive_buffer()
150 static int spi_sh_wait_write_buffer_empty(struct spi_sh_data *ss) in spi_sh_wait_write_buffer_empty() argument
154 while (!(spi_sh_read(ss, SPI_SH_CR1) & SPI_SH_TBE)) { in spi_sh_wait_write_buffer_empty()
162 static int spi_sh_send(struct spi_sh_data *ss, struct spi_message *mesg, in spi_sh_send() argument
172 spi_sh_set_bit(ss, SPI_SH_SSA, SPI_SH_CR1); in spi_sh_send()
178 !(spi_sh_read(ss, SPI_SH_CR4) & in spi_sh_send()
180 !(spi_sh_read(ss, SPI_SH_CR1) & SPI_SH_TBF); in spi_sh_send()
182 spi_sh_write(ss, (unsigned long)data[i], SPI_SH_TBR); in spi_sh_send()
184 if (spi_sh_read(ss, SPI_SH_CR4) & SPI_SH_WPABRT) { in spi_sh_send()
186 spi_sh_set_bit(ss, SPI_SH_WPABRT, SPI_SH_CR4); in spi_sh_send()
197 ss->cr1 &= ~SPI_SH_TBE; in spi_sh_send()
198 spi_sh_set_bit(ss, SPI_SH_TBE, SPI_SH_CR4); in spi_sh_send()
199 ret = wait_event_interruptible_timeout(ss->wait, in spi_sh_send()
200 ss->cr1 & SPI_SH_TBE, in spi_sh_send()
202 if (ret == 0 && !(ss->cr1 & SPI_SH_TBE)) { in spi_sh_send()
210 spi_sh_clear_bit(ss, SPI_SH_SSD | SPI_SH_SSDB, SPI_SH_CR1); in spi_sh_send()
211 spi_sh_set_bit(ss, SPI_SH_SSA, SPI_SH_CR1); in spi_sh_send()
213 ss->cr1 &= ~SPI_SH_TBE; in spi_sh_send()
214 spi_sh_set_bit(ss, SPI_SH_TBE, SPI_SH_CR4); in spi_sh_send()
215 ret = wait_event_interruptible_timeout(ss->wait, in spi_sh_send()
216 ss->cr1 & SPI_SH_TBE, in spi_sh_send()
218 if (ret == 0 && (ss->cr1 & SPI_SH_TBE)) { in spi_sh_send()
227 static int spi_sh_receive(struct spi_sh_data *ss, struct spi_message *mesg, in spi_sh_receive() argument
237 spi_sh_write(ss, SPI_SH_MAX_BYTE, SPI_SH_CR3); in spi_sh_receive()
239 spi_sh_write(ss, t->len, SPI_SH_CR3); in spi_sh_receive()
241 spi_sh_clear_bit(ss, SPI_SH_SSD | SPI_SH_SSDB, SPI_SH_CR1); in spi_sh_receive()
242 spi_sh_set_bit(ss, SPI_SH_SSA, SPI_SH_CR1); in spi_sh_receive()
244 spi_sh_wait_write_buffer_empty(ss); in spi_sh_receive()
249 ss->cr1 &= ~SPI_SH_RBF; in spi_sh_receive()
250 spi_sh_set_bit(ss, SPI_SH_RBF, SPI_SH_CR4); in spi_sh_receive()
251 ret = wait_event_interruptible_timeout(ss->wait, in spi_sh_receive()
252 ss->cr1 & SPI_SH_RBF, in spi_sh_receive()
255 spi_sh_read(ss, SPI_SH_CR1) & SPI_SH_RBE) { in spi_sh_receive()
263 if (spi_sh_wait_receive_buffer(ss)) in spi_sh_receive()
265 data[i] = (unsigned char)spi_sh_read(ss, SPI_SH_RBR); in spi_sh_receive()
274 clear_fifo(ss); in spi_sh_receive()
275 spi_sh_write(ss, 1, SPI_SH_CR3); in spi_sh_receive()
277 spi_sh_write(ss, 0, SPI_SH_CR3); in spi_sh_receive()
285 struct spi_sh_data *ss = container_of(work, struct spi_sh_data, ws); in spi_sh_work() local
293 spin_lock_irqsave(&ss->lock, flags); in spi_sh_work()
294 while (!list_empty(&ss->queue)) { in spi_sh_work()
295 mesg = list_entry(ss->queue.next, struct spi_message, queue); in spi_sh_work()
298 spin_unlock_irqrestore(&ss->lock, flags); in spi_sh_work()
306 ret = spi_sh_send(ss, mesg, t); in spi_sh_work()
311 ret = spi_sh_receive(ss, mesg, t); in spi_sh_work()
317 spin_lock_irqsave(&ss->lock, flags); in spi_sh_work()
324 clear_fifo(ss); in spi_sh_work()
325 spi_sh_set_bit(ss, SPI_SH_SSD, SPI_SH_CR1); in spi_sh_work()
328 spi_sh_clear_bit(ss, SPI_SH_SSA | SPI_SH_SSDB | SPI_SH_SSD, in spi_sh_work()
331 clear_fifo(ss); in spi_sh_work()
333 spin_unlock_irqrestore(&ss->lock, flags); in spi_sh_work()
342 spi_sh_clear_bit(ss, SPI_SH_SSA | SPI_SH_SSDB | SPI_SH_SSD, in spi_sh_work()
344 clear_fifo(ss); in spi_sh_work()
350 struct spi_sh_data *ss = spi_master_get_devdata(spi->master); in spi_sh_setup() local
354 spi_sh_write(ss, 0xfe, SPI_SH_CR1); /* SPI sycle stop */ in spi_sh_setup()
355 spi_sh_write(ss, 0x00, SPI_SH_CR1); /* CR1 init */ in spi_sh_setup()
356 spi_sh_write(ss, 0x00, SPI_SH_CR3); /* CR3 init */ in spi_sh_setup()
358 clear_fifo(ss); in spi_sh_setup()
361 spi_sh_write(ss, spi_sh_read(ss, SPI_SH_CR2) | 0x07, SPI_SH_CR2); in spi_sh_setup()
369 struct spi_sh_data *ss = spi_master_get_devdata(spi->master); in spi_sh_transfer() local
375 spin_lock_irqsave(&ss->lock, flags); in spi_sh_transfer()
380 spi_sh_clear_bit(ss, SPI_SH_SSA, SPI_SH_CR1); in spi_sh_transfer()
382 list_add_tail(&mesg->queue, &ss->queue); in spi_sh_transfer()
383 queue_work(ss->workqueue, &ss->ws); in spi_sh_transfer()
385 spin_unlock_irqrestore(&ss->lock, flags); in spi_sh_transfer()
392 struct spi_sh_data *ss = spi_master_get_devdata(spi->master); in spi_sh_cleanup() local
396 spi_sh_clear_bit(ss, SPI_SH_SSA | SPI_SH_SSDB | SPI_SH_SSD, in spi_sh_cleanup()
402 struct spi_sh_data *ss = (struct spi_sh_data *)_ss; in spi_sh_irq() local
405 cr1 = spi_sh_read(ss, SPI_SH_CR1); in spi_sh_irq()
407 ss->cr1 |= SPI_SH_TBE; in spi_sh_irq()
409 ss->cr1 |= SPI_SH_TBF; in spi_sh_irq()
411 ss->cr1 |= SPI_SH_RBE; in spi_sh_irq()
413 ss->cr1 |= SPI_SH_RBF; in spi_sh_irq()
415 if (ss->cr1) { in spi_sh_irq()
416 spi_sh_clear_bit(ss, ss->cr1, SPI_SH_CR4); in spi_sh_irq()
417 wake_up(&ss->wait); in spi_sh_irq()
425 struct spi_sh_data *ss = platform_get_drvdata(pdev); in spi_sh_remove() local
427 spi_unregister_master(ss->master); in spi_sh_remove()
428 destroy_workqueue(ss->workqueue); in spi_sh_remove()
429 free_irq(ss->irq, ss); in spi_sh_remove()
438 struct spi_sh_data *ss; in spi_sh_probe() local
460 ss = spi_master_get_devdata(master); in spi_sh_probe()
461 platform_set_drvdata(pdev, ss); in spi_sh_probe()
465 ss->width = 8; in spi_sh_probe()
468 ss->width = 32; in spi_sh_probe()
475 ss->irq = irq; in spi_sh_probe()
476 ss->master = master; in spi_sh_probe()
477 ss->addr = devm_ioremap(&pdev->dev, res->start, resource_size(res)); in spi_sh_probe()
478 if (ss->addr == NULL) { in spi_sh_probe()
483 INIT_LIST_HEAD(&ss->queue); in spi_sh_probe()
484 spin_lock_init(&ss->lock); in spi_sh_probe()
485 INIT_WORK(&ss->ws, spi_sh_work); in spi_sh_probe()
486 init_waitqueue_head(&ss->wait); in spi_sh_probe()
487 ss->workqueue = create_singlethread_workqueue( in spi_sh_probe()
489 if (ss->workqueue == NULL) { in spi_sh_probe()
495 ret = request_irq(irq, spi_sh_irq, 0, "spi_sh", ss); in spi_sh_probe()
516 free_irq(irq, ss); in spi_sh_probe()
518 destroy_workqueue(ss->workqueue); in spi_sh_probe()